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Contents

README

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74AHCT541PW

Nexperia · Buffers, Drivers, Receivers, Transceivers · TSSOP-20

74AHCT541PW from Nexperia, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE0 input Output enable input (active LOW); when HIGH, drives all outputs Y0-Y7 to high-impedance state.
2 A0 input Data input for 8-bit buffer; TTL-level compatible with overvoltage tolerance.
3 A1 input Data input for 8-bit buffer; TTL-level compatible with overvoltage tolerance.
4 A2 input Data input for 8-bit buffer; TTL-level compatible with overvoltage tolerance.
5 A3 input Data input for 8-bit buffer; TTL-level compatible with overvoltage tolerance.
6 A4 input Data input for 8-bit buffer; TTL-level compatible with overvoltage tolerance.
7 A5 input Data input for 8-bit buffer; TTL-level compatible with overvoltage tolerance.
8 A6 input Data input for 8-bit buffer; TTL-level compatible with overvoltage tolerance.
9 A7 input Data input for 8-bit buffer; TTL-level compatible with overvoltage tolerance.
10 GND power_in Ground (0 V).
11 Y7 tri_state Data output with 3-state control; high-impedance when OE0 or OE1 is HIGH.
12 Y6 tri_state Data output with 3-state control; high-impedance when OE0 or OE1 is HIGH.
13 Y5 tri_state Data output with 3-state control; high-impedance when OE0 or OE1 is HIGH.
14 Y4 tri_state Data output with 3-state control; high-impedance when OE0 or OE1 is HIGH.
15 Y3 tri_state Data output with 3-state control; high-impedance when OE0 or OE1 is HIGH.
16 Y2 tri_state Data output with 3-state control; high-impedance when OE0 or OE1 is HIGH.
17 Y1 tri_state Data output with 3-state control; high-impedance when OE0 or OE1 is HIGH.
18 Y0 tri_state Data output with 3-state control; high-impedance when OE0 or OE1 is HIGH.
19 OE1 input Output enable input (active LOW); when HIGH, drives all outputs Y0-Y7 to high-impedance state.
20 VCC power_in Supply voltage; 4.5 V to 5.5 V for 74AHCT541.

Key specifications

Parameter Value
Manufacturer Nexperia
Package TSSOP-20
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: 74AHCT541PW
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: 74ahct541pw-etched.step / 74ahct541pw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74ahct541pw.step / 74ahct541pw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (15 pp, sha256 aec82e11dba1ba52, retrieved 2026-09-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF