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74AHCT2G08DP-Q100

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Nexperia Logic Gates, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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74AHCT2G08DP-Q100

Nexperia · Logic Gates · TSSOP-8

74AHCT2G08DP-Q100 from Nexperia, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Data input A of gate 1; AHCT device has TTL input levels (VIH 2.0 V min, VIL 0.8 V max) and inputs tolerate up to 5.5 V.
2 1B input Data input B of gate 1; AHCT device has TTL input levels (VIH 2.0 V min, VIL 0.8 V max) and inputs tolerate up to 5.5 V.
3 2Y output Data output of gate 2 (AND of 2A and 2B); output current limited to ±25 mA absolute maximum.
4 GND power_in Ground (0 V).
5 2A input Data input A of gate 2; AHCT device has TTL input levels (VIH 2.0 V min, VIL 0.8 V max) and inputs tolerate up to 5.5 V.
6 2B input Data input B of gate 2; AHCT device has TTL input levels (VIH 2.0 V min, VIL 0.8 V max) and inputs tolerate up to 5.5 V.
7 1Y output Data output of gate 1 (AND of 1A and 1B); output current limited to ±25 mA absolute maximum.
8 VCC power_in Supply voltage, 4.5 V to 5.5 V recommended for AHCT (absolute maximum -0.5 V to +7.0 V).

Key specifications

Parameter Value
Manufacturer Nexperia
Package TSSOP-8
Category Logic
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 7 V 4
Input voltage VI -0.5 7 V 4
Input clamping current IIK -20 mA VI < -0.5 V 4
Output clamping current IOK 20 mA VO < -0.5 V or VO > VCC + 0.5 V; ±20 4
Output current IO 25 mA -0.5 V < VO < VCC + 0.5 V; ±25 4
Supply current ICC 75 mA 4
Ground current IGND -75 mA 4
Storage temperature Tstg -65 150 °C 4
Total power dissipation Ptot 250 mW Tamb = -40 °C to +125 °C; SOT505-2 above 96 °C derates linearly 4.6 mW/K 4
Supply voltage VCC 4.5 5 5.5 V 74AHCT2G08-Q100 4
Input voltage VI 0 5.5 V 4
Output voltage VO 0 V max = VCC 4
Ambient temperature Tamb -40 25 125 °C 4
Input transition rise and fall rate Δt/ΔV 20 ns/V VCC = 5.0 V ± 0.5 V 4
HIGH-level input voltage VIH 2 V VCC = 4.5 V to 5.5 V; 25 °C, -40 to +85 °C, -40 to +125 °C 6
LOW-level input voltage VIL 0.8 V VCC = 4.5 V to 5.5 V; 25 °C, -40 to +85 °C, -40 to +125 °C 6
HIGH-level output voltage VOH 4.4 4.5 V VI = VIH or VIL; VCC = 4.5 V; IO = -50 μA; 25 °C 6
HIGH-level output voltage VOH 4.4 V VI = VIH or VIL; VCC = 4.5 V; IO = -50 μA; -40 °C to +85 °C and -40 °C to +125 °C 6
HIGH-level output voltage VOH 3.94 V VI = VIH or VIL; VCC = 4.5 V; IO = -8.0 mA; 25 °C 6
HIGH-level output voltage VOH 3.8 V VI = VIH or VIL; VCC = 4.5 V; IO = -8.0 mA; -40 °C to +85 °C 6
HIGH-level output voltage VOH 3.7 V VI = VIH or VIL; VCC = 4.5 V; IO = -8.0 mA; -40 °C to +125 °C 6
LOW-level output voltage VOL 0 0.1 V VI = VIH or VIL; VCC = 4.5 V; IO = 50 μA; 25 °C 6
LOW-level output voltage VOL 0.1 V VI = VIH or VIL; VCC = 4.5 V; IO = 50 μA; -40 °C to +85 °C and -40 °C to +125 °C 6
LOW-level output voltage VOL 0.36 V VI = VIH or VIL; VCC = 4.5 V; IO = 8.0 mA; 25 °C 6
LOW-level output voltage VOL 0.44 V VI = VIH or VIL; VCC = 4.5 V; IO = 8.0 mA; -40 °C to +85 °C 6
LOW-level output voltage VOL 0.55 V VI = VIH or VIL; VCC = 4.5 V; IO = 8.0 mA; -40 °C to +125 °C 6
Input leakage current II 0.1 μA VI = 5.5 V or GND; VCC = 0 V to 5.5 V; 25 °C 6
Input leakage current II 1 μA VI = 5.5 V or GND; VCC = 0 V to 5.5 V; -40 °C to +85 °C 6
Input leakage current II 2 μA VI = 5.5 V or GND; VCC = 0 V to 5.5 V; -40 °C to +125 °C 6
Supply current ICC 1 μA VI = VCC or GND; IO = 0 A; VCC = 5.5 V; 25 °C 6
Supply current ICC 10 μA VI = VCC or GND; IO = 0 A; VCC = 5.5 V; -40 °C to +85 °C 6
Supply current ICC 40 μA VI = VCC or GND; IO = 0 A; VCC = 5.5 V; -40 °C to +125 °C 6
Additional supply current ΔICC 1.35 mA per input pin; VI = 3.4 V; other inputs at VCC or GND; IO = 0 A; VCC = 5.5 V; 25 °C 6
Additional supply current ΔICC 1.5 mA per input pin; VI = 3.4 V; other inputs at VCC or GND; IO = 0 A; VCC = 5.5 V; -40 °C to +85 °C and -40 °C to +125 °C 6
Input capacitance CI 1.5 10 pF 25 °C; max 10 also for -40 to +85 °C and -40 to +125 °C 6
Propagation delay nA, nB to nY tpd 3.6 6.2 ns VCC = 4.5 V to 5.5 V; CL = 15 pF; 25 °C 7
Propagation delay nA, nB to nY tpd 1 7.1 ns VCC = 4.5 V to 5.5 V; CL = 15 pF; -40 °C to +85 °C 7
Propagation delay nA, nB to nY tpd 1 8 ns VCC = 4.5 V to 5.5 V; CL = 15 pF; -40 °C to +125 °C 7
Propagation delay nA, nB to nY tpd 5.1 7.9 ns VCC = 4.5 V to 5.5 V; CL = 50 pF; 25 °C 7
Propagation delay nA, nB to nY tpd 1 9 ns VCC = 4.5 V to 5.5 V; CL = 50 pF; -40 °C to +85 °C 7
Propagation delay nA, nB to nY tpd 1 10.5 ns VCC = 4.5 V to 5.5 V; CL = 50 pF; -40 °C to +125 °C 7
Power dissipation capacitance CPD 19 pF per buffer; CL = 50 pF; fi = 1 MHz; VI = GND to VCC; 25 °C 7

CAD (KiCad official)

  • Symbol: 74AHCT2G08DP-Q100
  • Footprint: Package_SO:TSSOP-8_3x3mm_P0.65mm
  • 3D model: TSSOP-8 (KiCad packages3D, STEP)
  • 3D model files: 74ahct2g08dp-q100-etched.step / 74ahct2g08dp-q100-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74ahct2g08dp-q100.step / 74ahct2g08dp-q100.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (14 pp, sha256 60375e21be32bd42, retrieved 2026-10-23, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF