component
74AHCT245PW
Public Made by Adomby adom
Nexperia Receivers & Transceivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 4h ago |
| viewers | 4h ago |
| 74ahct245pw-etched.glb | 4h ago |
| 74ahct245pw-etched.step | 4h ago |
| 74ahct245pw-hero.glb | 4h ago |
| 74ahct245pw-hero.overlay.json | 4h ago |
| 74ahct245pw.glb | 4h ago |
| 74ahct245pw.kicad_mod | 4h ago |
| 74ahct245pw.kicad_sym | 4h ago |
| 74ahct245pw.lbr | 4h ago |
| 74ahct245pw.step | 4h ago |
| package.json | 4h ago |
| page.json | 4h ago |
| README.md | 4h ago |
74AHCT245PW
Nexperia · Receivers & Transceivers · TSSOP-20
74AHCT245PW from Nexperia, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | DIR | input | Direction control input (table 2: direction control input) that selects the transfer direction between the A and B data ports per the function table. |
| 2 | A0 | bidirectional | Data input/output port A0, which is high-impedance when OE is HIGH. |
| 3 | A1 | bidirectional | Data input/output port A1, which is high-impedance when OE is HIGH. |
| 4 | A2 | bidirectional | Data input/output port A2, which is high-impedance when OE is HIGH. |
| 5 | A3 | bidirectional | Data input/output port A3, which is high-impedance when OE is HIGH. |
| 6 | A4 | bidirectional | Data input/output port A4, which is high-impedance when OE is HIGH. |
| 7 | A5 | bidirectional | Data input/output port A5, which is high-impedance when OE is HIGH. |
| 8 | A6 | bidirectional | Data input/output port A6, which is high-impedance when OE is HIGH. |
| 9 | A7 | bidirectional | Data input/output port A7, which is high-impedance when OE is HIGH. |
| 10 | GND | power_in | Ground (0 V) reference for all voltages on the device. |
| 11 | B7 | bidirectional | Data input/output port B7, which is high-impedance when OE is HIGH. |
| 12 | B6 | bidirectional | Data input/output port B6, which is high-impedance when OE is HIGH. |
| 13 | B5 | bidirectional | Data input/output port B5, which is high-impedance when OE is HIGH. |
| 14 | B4 | bidirectional | Data input/output port B4, which is high-impedance when OE is HIGH. |
| 15 | B3 | bidirectional | Data input/output port B3, which is high-impedance when OE is HIGH. |
| 16 | B2 | bidirectional | Data input/output port B2, which is high-impedance when OE is HIGH. |
| 17 | B1 | bidirectional | Data input/output port B1, which is high-impedance when OE is HIGH. |
| 18 | B0 | bidirectional | Data input/output port B0, which is high-impedance when OE is HIGH. |
| 19 | OE | input | Output enable input (active LOW); a HIGH level causes the outputs to assume a high-impedance OFF-state. |
| 20 | VCC | power_in | Supply voltage; 2.0 V to 5.5 V for 74AHC245 and 4.5 V to 5.5 V for 74AHCT245 per recommended operating conditions. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-20 |
| Category | Logic ICs |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | 4.5 | 5 | 5.5 | V | 4 | |
| Input voltage | VI | 0 | 5.5 | V | 4 | ||
| Output voltage | VO | 0 | V | maximum printed as VCC | 4 | ||
| Ambient temperature | Tamb | -40 | 25 | 125 | °C | 4 | |
| Input transition rise and fall rate | Δt/ΔV | 20 | ns/V | VCC = 5.0 V ± 0.5 V | 4 | ||
| Supply voltage | VCC | -0.5 | 7 | V | 4 | ||
| Input voltage | VI | -0.5 | 7 | V | 4 | ||
| Input clamping current | IIK | -20 | mA | VI < -0.5 V | 4 | ||
| Output clamping current | IOK | -20 | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 4 | |
| Output current | IO | -25 | 25 | mA | VO = -0.5 V to (VCC + 0.5 V) | 4 | |
| Supply current | ICC | 75 | mA | 4 | |||
| Ground current | IGND | -75 | mA | 4 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Total power dissipation | Ptot | 500 | mW | Tamb = -40 °C to +125 °C | 4 | ||
| HIGH-level input voltage | VIH | 2 | V | VCC = 4.5 V to 5.5 V; -40 °C to +125 °C | 6 | ||
| LOW-level input voltage | VIL | 0.8 | V | VCC = 4.5 V to 5.5 V; -40 °C to +125 °C | 6 | ||
| HIGH-level output voltage | VOH | 4.4 | 4.5 | V | VI = VIH or VIL; VCC = 4.5 V; IO = -50 μA; -40 °C to +125 °C | 6 | |
| HIGH-level output voltage | VOH | 3.7 | V | VI = VIH or VIL; VCC = 4.5 V; IO = -8.0 mA; -40 °C to +125 °C | 6 | ||
| LOW-level output voltage | VOL | 0 | 0.1 | V | VI = VIH or VIL; VCC = 4.5 V; IO = 50 μA; -40 °C to +125 °C | 6 | |
| LOW-level output voltage | VOL | 0.55 | V | VI = VIH or VIL; VCC = 4.5 V; IO = 8.0 mA; -40 °C to +125 °C | 6 | ||
| Input leakage current | II | 2 | μA | VI = 5.5 V or GND; VCC = 0 V to 5.5 V; -40 °C to +125 °C | 6 | ||
| OFF-state output current | IOZ | -10 | 10 | μA | VI = VIH or VIL; VO = VCC or GND; VCC = 5.5 V; -40 °C to +125 °C | 6 | |
| Supply current | ICC | 80 | μA | VI = VCC or GND; IO = 0 A; VCC = 5.5 V; -40 °C to +125 °C | 6 | ||
| Additional supply current | ΔICC | 1.5 | mA | per input pin; VI = VCC - 2.1 V; other pins at VCC or GND; IO = 0 A; VCC = 4.5 V to 5.5 V; -40 °C to +125 °C | 6 | ||
| Input capacitance | CI | 3 | 10 | pF | VI = VCC or GND; -40 °C to +125 °C | 6 | |
| Propagation delay An to Bn, Bn to An | tpd | 1 | 3.5 | 10 | ns | VCC = 4.5 V to 5.5 V; CL = 15 pF; -40 °C to +125 °C | 8 |
| Propagation delay An to Bn, Bn to An | tpd | 1 | 4.5 | 11 | ns | VCC = 4.5 V to 5.5 V; CL = 50 pF; -40 °C to +125 °C | 8 |
| Enable time OE to An, OE to Bn | ten | 1 | 5 | 17.5 | ns | VCC = 4.5 V to 5.5 V; CL = 15 pF; -40 °C to +125 °C | 8 |
| Enable time OE to An, OE to Bn | ten | 1 | 6 | 18.5 | ns | VCC = 4.5 V to 5.5 V; CL = 50 pF; -40 °C to +125 °C | 8 |
| Disable time OE to An, OE to Bn | tdis | 1 | 5 | 18 | ns | VCC = 4.5 V to 5.5 V; CL = 15 pF; -40 °C to +125 °C | 8 |
| Disable time OE to An, OE to Bn | tdis | 1 | 6 | 19.5 | ns | VCC = 4.5 V to 5.5 V; CL = 50 pF; -40 °C to +125 °C | 8 |
| Output capacitance | CO | 4 | pF | 6 | |||
| Power dissipation capacitance | CPD | 15 | pF | fi = 1 MHz; VI = GND to VCC | 8 |
CAD (KiCad official)
- Symbol:
74AHCT245PW - Footprint:
Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm - 3D model: TSSOP-20 (KiCad packages3D, STEP)
- 3D model files:
74ahct245pw-etched.step/74ahct245pw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74ahct245pw.step/74ahct245pw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (16 pp, sha256
ef514139a3ea3f42, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusoff(skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).