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74AHCT17APWJ

Public Made by Adom

by adom

Nexperia Buffer/Driver/Transceiver, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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74AHCT17APWJ

Nexperia · Buffer/Driver/Transceiver · TSSOP-14

74AHCT17APWJ from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Data input 1A of a Schmitt-trigger buffer, TTL compatible and fully specified for partial power-down operation using IOFF.
2 1Y output Data output 1Y, which the IOFF circuitry disables when the device is powered down to prevent damaging backflow current.
3 2A input Data input 2A of a Schmitt-trigger buffer, TTL compatible and fully specified for partial power-down operation using IOFF.
4 2Y output Data output 2Y, which the IOFF circuitry disables when the device is powered down to prevent damaging backflow current.
5 3A input Data input 3A of a Schmitt-trigger buffer, TTL compatible and fully specified for partial power-down operation using IOFF.
6 3Y output Data output 3Y, which the IOFF circuitry disables when the device is powered down to prevent damaging backflow current.
7 GND power_in Ground reference (0 V) for all voltages referenced in the datasheet.
8 4Y output Data output 4Y, which the IOFF circuitry disables when the device is powered down to prevent damaging backflow current.
9 4A input Data input 4A of a Schmitt-trigger buffer, TTL compatible and fully specified for partial power-down operation using IOFF.
10 5Y output Data output 5Y, which the IOFF circuitry disables when the device is powered down to prevent damaging backflow current.
11 5A input Data input 5A of a Schmitt-trigger buffer, TTL compatible and fully specified for partial power-down operation using IOFF.
12 6Y output Data output 6Y, which the IOFF circuitry disables when the device is powered down to prevent damaging backflow current.
13 6A input Data input 6A of a Schmitt-trigger buffer, TTL compatible and fully specified for partial power-down operation using IOFF.
14 VCC power_in Supply voltage, recommended operating range 4.5 V to 5.5 V.

Key specifications

Parameter Value
Manufacturer Nexperia
Package TSSOP-14
Category Logic ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage VCC 4.5 5 5.5 V 3
input voltage VI 0 5.5 V 3
output voltage VO 0 V output HIGH or LOW state 3
output voltage VO 0 5.5 V output power-down 3
ambient temperature Tamb -40 25 125 °C 3
input transition rise and fall rate Δt/ΔV 1 ms/V VCC = 5.0 V ± 0.5 V 3
supply voltage VCC -0.5 7 V 3
input voltage VI -0.5 7 V 3
output voltage VO -0.5 V output HIGH or LOW state 3
output voltage VO -0.5 7 V output power-down 3
input clamping current IIK -20 mA VI < 0 V 3
output clamping current IOK -20 mA VO < 0 V 3
output current IO -25 25 mA VO = 0 V to VCC 3
supply current ICC 75 mA 3
ground current IGND -75 mA 3
storage temperature Tstg -65 150 °C 3
total power dissipation Ptot 500 mW Tamb = -40 °C to +125 °C 3
positive-going threshold voltage VT+ 1.9 V VCC = 4.5 V 4
positive-going threshold voltage VT+ 2.1 V VCC = 5.5 V 4
negative-going threshold voltage VT- 0.5 V VCC = 4.5 V 4
negative-going threshold voltage VT- 0.6 V VCC = 5.5 V 4
hysteresis voltage VH 0.4 1.4 V VCC = 4.5 V 4
hysteresis voltage VH 0.4 1.5 V VCC = 5.5 V 4
HIGH-level output voltage VOH 4.4 V VI = VIH or VIL; VCC = 4.5 V; IO = -50 μA 4
HIGH-level output voltage VOH 3.7 V VI = VIH or VIL; VCC = 4.5 V; IO = -8 mA 4
LOW-level output voltage VOL 0.1 V VI = VIH or VIL; VCC = 4.5 V; IO = 50 μA 4
LOW-level output voltage VOL 0.55 V VI = VIH or VIL; VCC = 4.5 V; IO = 8 mA 4
power-off leakage current IOFF 5 μA VI or VO = GND to 5.5 V; VCC = 0 V 4
input leakage current II -1 1 μA VI = VCC or GND; VCC = 0 V to 5.5 V 4
supply current ICC 20 μA VI = VCC or GND; IO = 0 A; VCC = 5.5 V 4
additional supply current ΔICC 1.5 mA per input pin; VCC = 5.5 V; VI = 3.4 V; IO = 0 A; other pins at VCC or GND 4
propagation delay tpd 1 3.2 10.6 ns nA to nY; VCC = 4.5 V to 5.5 V; CL = 15 pF 6
propagation delay tpd 1 5 12.1 ns nA to nY; VCC = 4.5 V to 5.5 V; CL = 50 pF 6
input capacitance CI 2 6 pF VI = VCC or GND; VCC = 5 V 6
LOW-level output voltage (peak) VOL(p) 0.4 0.8 V VCC = 5 V; CL = 50 pF 6
LOW-level output voltage (valley) VOL(v) -0.8 -0.2 V VCC = 5 V; CL = 50 pF 6
AC HIGH-level input voltage VIH(AC) 2 V 6
AC LOW-level input voltage VIL(AC) 0.8 V 6

CAD (KiCad official)

  • Symbol: 74AHCT17APWJ
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: 74ahct17apwj-etched.step / 74ahct17apwj-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74ahct17apwj.step / 74ahct17apwj.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (11 pp, sha256 431eb8ac5b472dde, retrieved 2026-10-17, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF