component
74AHCT138D
Public Made by Adomby adom
Nexperia Signal Switches, Multiplexers, Decoders, SO-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
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74AHCT138D
Nexperia · Signal Switches, Multiplexers, Decoders · SO-16
74AHCT138D from Nexperia, in a SO-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Address input A0, one of three binary-weighted inputs that select which output Y0 to Y7 is LOW when enabled. |
| 2 | A1 | input | Address input A1, one of three binary-weighted inputs that select which output Y0 to Y7 is LOW when enabled. |
| 3 | A2 | input | Address input A2, one of three binary-weighted inputs that select which output Y0 to Y7 is LOW when enabled. |
| 4 | E1 | input | Enable input E1, active LOW; all outputs stay HIGH unless E1 and E2 are LOW and E3 is HIGH. |
| 5 | E2 | input | Enable input E2, active LOW; all outputs stay HIGH unless E1 and E2 are LOW and E3 is HIGH. |
| 6 | E3 | input | Enable input E3, active HIGH; all outputs stay HIGH unless E1 and E2 are LOW and E3 is HIGH. |
| 7 | Y7 | output | Output Y7, active LOW; goes LOW when selected by A0 to A2 with the enables asserted, otherwise HIGH. |
| 8 | GND | power_in | Ground (0 V) reference for all voltages on the device. |
| 9 | Y6 | output | Output Y6, active LOW; goes LOW when selected by A0 to A2 with the enables asserted, otherwise HIGH. |
| 10 | Y5 | output | Output Y5, active LOW; goes LOW when selected by A0 to A2 with the enables asserted, otherwise HIGH. |
| 11 | Y4 | output | Output Y4, active LOW; goes LOW when selected by A0 to A2 with the enables asserted, otherwise HIGH. |
| 12 | Y3 | output | Output Y3, active LOW; goes LOW when selected by A0 to A2 with the enables asserted, otherwise HIGH. |
| 13 | Y2 | output | Output Y2, active LOW; goes LOW when selected by A0 to A2 with the enables asserted, otherwise HIGH. |
| 14 | Y1 | output | Output Y1, active LOW; goes LOW when selected by A0 to A2 with the enables asserted, otherwise HIGH. |
| 15 | Y0 | output | Output Y0, active LOW; goes LOW when selected by A0 to A2 with the enables asserted, otherwise HIGH. |
| 16 | VCC | power_in | Supply voltage; 4.5 V to 5.5 V for 74AHCT138 per Table 5 (recommended operating conditions). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SO-16 |
| Category | Logic |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input voltage HIGH-level | VIH | 2 | V | VCC = 4.5 V to 5.5 V; 25 C | 6 | ||
| Input voltage LOW-level | VIL | 0.8 | V | VCC = 4.5 V to 5.5 V; 25 C | 6 | ||
| HIGH-level output voltage | VOH | 4.4 | 4.5 | V | VI = VIH or VIL; VCC = 4.5 V; IO = 50 uA; 25 C | 6 | |
| HIGH-level output voltage | VOH | 4.4 | V | VI = VIH or VIL; VCC = 4.5 V; IO = 50 uA; 40 C to +125 C | 6 | ||
| HIGH-level output voltage | VOH | 3.94 | V | VI = VIH or VIL; VCC = 4.5 V; IO = 8.0 mA; 25 C | 6 | ||
| HIGH-level output voltage | VOH | 3.7 | V | VI = VIH or VIL; VCC = 4.5 V; IO = 8.0 mA; 40 C to +125 C | 6 | ||
| LOW-level output voltage | VOL | 0 | 0.1 | V | VI = VIH or VIL; VCC = 4.5 V; IO = 50 uA; 25 C | 6 | |
| LOW-level output voltage | VOL | 0.1 | V | VI = VIH or VIL; VCC = 4.5 V; IO = 50 uA; 40 C to +125 C | 6 | ||
| LOW-level output voltage | VOL | 0.36 | V | VI = VIH or VIL; VCC = 4.5 V; IO = 8.0 mA; 25 C | 6 | ||
| LOW-level output voltage | VOL | 0.55 | V | VI = VIH or VIL; VCC = 4.5 V; IO = 8.0 mA; 40 C to +125 C | 6 | ||
| Input leakage current | II | 0.1 | uA | VI = 5.5 V or GND; VCC = 0 V or 5.5 V; 25 C | 6 | ||
| Input leakage current | II | 1 | uA | VI = 5.5 V or GND; VCC = 0 V or 5.5 V; 40 C to +85 C | 6 | ||
| Input leakage current | II | 2 | uA | VI = 5.5 V or GND; VCC = 0 V or 5.5 V; 40 C to +125 C | 6 | ||
| Supply current | ICC | 4 | uA | VI = VCC or GND; IO = 0 A; VCC = 5.5 V; 25 C | 6 | ||
| Supply current | ICC | 40 | uA | VI = VCC or GND; IO = 0 A; VCC = 5.5 V; 40 C to +85 C | 6 | ||
| Supply current | ICC | 80 | uA | VI = VCC or GND; IO = 0 A; VCC = 5.5 V; 40 C to +125 C | 6 | ||
| Additional supply current per input pin | ICC | 1.35 | mA | per input pin; VI = VCC - 2.1 V; IO = 0 A; other pins at VCC or GND; VCC = 4.5 V to 5.5 V; 25 C | 6 | ||
| Additional supply current per input pin | ICC | 1.5 | mA | per input pin; VI = VCC - 2.1 V; IO = 0 A; other pins at VCC or GND; VCC = 4.5 V to 5.5 V; 40 C to +125 C | 6 | ||
| Input capacitance | CI | 3 | 10 | pF | 25 C | 6 | |
| Input capacitance | CI | 10 | pF | 40 C to +125 C | 6 | ||
| Propagation delay An to Yn | tpd | 4.4 | 10.4 | ns | VCC = 4.5 V to 5.5 V; CL = 15 pF; see Figure 6; 25 C | 8 | |
| Propagation delay An to Yn | tpd | 1 | 13 | ns | VCC = 4.5 V to 5.5 V; CL = 15 pF; see Figure 6; 40 C to +125 C | 8 | |
| Propagation delay An to Yn | tpd | 6.2 | 11.4 | ns | VCC = 4.5 V to 5.5 V; CL = 50 pF; see Figure 6; 25 C | 8 | |
| Propagation delay An to Yn | tpd | 1 | 14.5 | ns | VCC = 4.5 V to 5.5 V; CL = 50 pF; see Figure 6; 40 C to +125 C | 8 | |
| Propagation delay E3 to Yn | tpd | 4.3 | 9.1 | ns | VCC = 4.5 V to 5.5 V; CL = 15 pF; see Figure 6; 25 C | 8 | |
| Propagation delay E3 to Yn | tpd | 1 | 11.5 | ns | VCC = 4.5 V to 5.5 V; CL = 15 pF; see Figure 6; 40 C to +125 C | 8 | |
| Propagation delay E3 to Yn | tpd | 6.2 | 10.1 | ns | VCC = 4.5 V to 5.5 V; CL = 50 pF; see Figure 6; 25 C | 8 | |
| Propagation delay E3 to Yn | tpd | 1 | 13 | ns | VCC = 4.5 V to 5.5 V; CL = 50 pF; see Figure 6; 40 C to +125 C | 8 | |
| Propagation delay E1, E2 to Yn | tpd | 4.3 | 9.6 | ns | VCC = 4.5 V to 5.5 V; CL = 15 pF; see Figure 7; 25 C | 8 | |
| Propagation delay E1, E2 to Yn | tpd | 1 | 12 | ns | VCC = 4.5 V to 5.5 V; CL = 15 pF; see Figure 7; 40 C to +125 C | 8 | |
| Propagation delay E1, E2 to Yn | tpd | 6.2 | 10.6 | ns | VCC = 4.5 V to 5.5 V; CL = 50 pF; see Figure 7; 25 C | 8 | |
| Propagation delay E1, E2 to Yn | tpd | 1 | 13.5 | ns | VCC = 4.5 V to 5.5 V; CL = 50 pF; see Figure 7; 40 C to +125 C | 8 | |
| Power dissipation capacitance | CPD | 23 | pF | CL = 50 pF; fi = 1 MHz; VI = GND to VCC | 8 | ||
| Supply voltage | VCC | 4.5 | 5 | 5.5 | V | 74AHCT138 type; Voltages referenced to GND | 5 |
| Input voltage | VI | 0 | 5.5 | V | 74AHCT138 type; Voltages referenced to GND | 5 | |
| Output voltage | VO | 0 | V | 74AHCT138 type; max = VCC | 5 | ||
| Ambient temperature | Tamb | -40 | 25 | 125 | C | 74AHCT138 type | 5 |
| Input transition rise and fall rate | t/V | 20 | ns/V | VCC = 5.0 V ±0.5 V | 5 | ||
| Supply voltage | VCC | -0.5 | 7 | V | Voltages referenced to GND | 4 | |
| Input voltage | VI | -0.5 | 7 | V | Voltages referenced to GND | 4 | |
| Input clamping current | IIK | -20 | mA | VI < -0.5 V | 4 | ||
| Output clamping current | IOK | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 4 | ||
| Output current | IO | 25 | mA | VO = -0.5 V to (VCC + 0.5 V) | 4 | ||
| Supply current | ICC | 75 | mA | 4 | |||
| Ground current | IGND | -75 | mA | 4 | |||
| Storage temperature | Tstg | -65 | 150 | C | 4 | ||
| Total power dissipation SO16 package | Ptot | 500 | mW | Tamb = 40 C to +125 C; SO16 package; derates 8 mW/K above 70 C | 4 |
CAD (KiCad official)
- Symbol:
74AHCT138D - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SO-16 (KiCad packages3D, STEP)
- 3D model files:
74ahct138d-etched.step/74ahct138d-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74ahct138d.step/74ahct138d.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (17 pp, sha256
63520b5b696b050e, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed (audit)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).