component

74AHC2G00DC

Public Made by Adom

by adom

Nexperia Logic Gates, VSSOP-8-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic74ahc2g00dcfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 5d ago
viewers 74ahc2g00dc: viewers · Ray 5d ago
74ahc2g00dc-etched.glb Publish 0.1.0 · Ray 5d ago
74ahc2g00dc-etched.step 74ahc2g00dc: factory component page (tier=lcsc) · Ray 5d ago
74ahc2g00dc-hero.glb 74ahc2g00dc: hero GLB from the etched model (keeps the MPN mark) · Ray 5d ago
74ahc2g00dc-hero.overlay.json Publish 0.1.0 · Ray 5d ago
74ahc2g00dc.glb Publish 0.1.0 · Ray 5d ago
74ahc2g00dc.kicad_mod Publish 0.1.0 · Ray 5d ago
74ahc2g00dc.kicad_sym Publish 0.1.0 · Ray 5d ago
74ahc2g00dc.lbr Publish 0.1.0 · Ray 5d ago
74ahc2g00dc.step Publish 0.1.0 · Ray 5d ago
package.json Publish 0.1.0 · Ray 5d ago
page.json Set visibility: public · Ray 5d ago
README.md Publish 0.1.0 · Ray 5d ago

74AHC2G00DC

Nexperia · Logic Gates · VSSOP-8-0.5mm

74AHC2G00DC from Nexperia, in a VSSOP-8-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Data input of NAND gate 1; recommended input voltage is 0 V to 5.5 V and absolute input voltage is limited to -0.5 V to +7.0 V.
2 1B input Data input of NAND gate 1; recommended input voltage is 0 V to 5.5 V and absolute input voltage is limited to -0.5 V to +7.0 V.
3 2Y output Data output of NAND gate 2; output voltage is 0 V to VCC and output current is limited to ±25 mA.
4 GND power_in Ground (0 V) reference for all device voltages.
5 2A input Data input of NAND gate 2; recommended input voltage is 0 V to 5.5 V and absolute input voltage is limited to -0.5 V to +7.0 V.
6 2B input Data input of NAND gate 2; recommended input voltage is 0 V to 5.5 V and absolute input voltage is limited to -0.5 V to +7.0 V.
7 1Y output Data output of NAND gate 1; output voltage is 0 V to VCC and output current is limited to ±25 mA.
8 VCC power_in Supply voltage: 2.0 V to 5.5 V for 74AHC2G00 and 4.5 V to 5.5 V for 74AHCT2G00 (absolute maximum 7.0 V).

Key specifications

Parameter Value
Manufacturer Nexperia
Package VSSOP-8-0.5mm
Category Logic
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage VCC 2 5 5.5 V 3
input voltage VI 0 5.5 V 3
output voltage VO 0 V 3
ambient temperature Tamb -40 25 125 °C 3
input transition rise and fall rate Δt/ΔV 100 ns/V VCC = 3.3 V ± 0.3 V 3
input transition rise and fall rate Δt/ΔV 20 ns/V VCC = 5.0 V ± 0.5 V 3
supply voltage VCC -0.5 7 V 3
input voltage VI -0.5 7 V 3
input clamping current IIK -20 mA VI < -0.5 V 3
output clamping current IOK -20 20 mA VO < -0.5 V or VO > VCC + 0.5 V 3
output current IO -25 25 mA -0.5 V < VO < VCC + 0.5 V 3
supply current ICC 75 mA 3
ground current IGND -75 mA 3
storage temperature Tstg -65 150 °C 3
total power dissipation Ptot 250 mW Tamb = -40 °C to +125 °C 3
HIGH-level input voltage VIH 1.5 V -40 °C to +125 °C; VCC = 2.0 V 4
HIGH-level input voltage VIH 2.1 V -40 °C to +125 °C; VCC = 3.0 V 4
HIGH-level input voltage VIH 3.85 V -40 °C to +125 °C; VCC = 5.5 V 4
LOW-level input voltage VIL 0.5 V -40 °C to +125 °C; VCC = 2.0 V 4
LOW-level input voltage VIL 0.9 V -40 °C to +125 °C; VCC = 3.0 V 4
LOW-level input voltage VIL 1.65 V -40 °C to +125 °C; VCC = 5.5 V 4
HIGH-level output voltage VOH 1.9 2 V 25 °C; IO = -50 μA; VCC = 2.0 V 4
HIGH-level output voltage VOH 2.9 3 V 25 °C; IO = -50 μA; VCC = 3.0 V 4
HIGH-level output voltage VOH 4.4 4.5 V 25 °C; IO = -50 μA; VCC = 4.5 V 4
HIGH-level output voltage VOH 2.58 V 25 °C; IO = -4.0 mA; VCC = 3.0 V 4
HIGH-level output voltage VOH 3.94 V 25 °C; IO = -8.0 mA; VCC = 4.5 V 4
HIGH-level output voltage VOH 1.9 V -40 °C to +125 °C; IO = -50 μA; VCC = 2.0 V 4
HIGH-level output voltage VOH 2.9 V -40 °C to +125 °C; IO = -50 μA; VCC = 3.0 V 4
HIGH-level output voltage VOH 4.4 V -40 °C to +125 °C; IO = -50 μA; VCC = 4.5 V 4
HIGH-level output voltage VOH 2.4 V -40 °C to +125 °C; IO = -4.0 mA; VCC = 3.0 V 4
HIGH-level output voltage VOH 3.7 V -40 °C to +125 °C; IO = -8.0 mA; VCC = 4.5 V 4
LOW-level output voltage VOL 0 0.1 V 25 °C; IO = 50 μA; VCC = 2.0 V 4
LOW-level output voltage VOL 0.36 V 25 °C; IO = 4.0 mA; VCC = 3.0 V 4
LOW-level output voltage VOL 0.1 V -40 °C to +125 °C; IO = 50 μA; VCC = 2.0 V 4
LOW-level output voltage VOL 0.55 V -40 °C to +125 °C; IO = 4.0 mA; VCC = 3.0 V 4
input leakage current II 0.1 μA 25 °C; VI = 5.5 V or GND; VCC = 0 V to 5.5 V 4
input leakage current II 2 μA -40 °C to +125 °C; VI = 5.5 V or GND; VCC = 0 V to 5.5 V 4
supply current ICC 10 μA 25 °C; VI = VCC or GND; IO = 0 A; VCC = 5.5 V 4
supply current ICC 40 μA -40 °C to +125 °C; VI = VCC or GND; IO = 0 A; VCC = 5.5 V 4
input capacitance CI 1.5 10 pF 25 °C 4
input capacitance CI 10 pF -40 °C to +125 °C 4
propagation delay nA, nB to nY tpd 4.5 7.9 ns 25 °C; VCC = 3.0 V to 3.6 V; CL = 15 pF 5
propagation delay nA, nB to nY tpd 6.5 11.4 ns 25 °C; VCC = 3.0 V to 3.6 V; CL = 50 pF 5
propagation delay nA, nB to nY tpd 3.5 5.5 ns 25 °C; VCC = 4.5 V to 5.5 V; CL = 15 pF 5
propagation delay nA, nB to nY tpd 4.9 7.5 ns 25 °C; VCC = 4.5 V to 5.5 V; CL = 50 pF 5
propagation delay nA, nB to nY tpd 1 10.5 ns -40 °C to +125 °C; VCC = 3.0 V to 3.6 V; CL = 15 pF 5
propagation delay nA, nB to nY tpd 1 14.5 ns -40 °C to +125 °C; VCC = 3.0 V to 3.6 V; CL = 50 pF 5
propagation delay nA, nB to nY tpd 1 7 ns -40 °C to +125 °C; VCC = 4.5 V to 5.5 V; CL = 15 pF 5
propagation delay nA, nB to nY tpd 1 9.5 ns -40 °C to +125 °C; VCC = 4.5 V to 5.5 V; CL = 50 pF 5

CAD (KiCad official)

  • Symbol: 74AHC2G00DC
  • Footprint: Package_SO:VSSOP-8_2.3x2mm_P0.5mm
  • 3D model: VSSOP-8-0.5mm (KiCad packages3D, STEP)
  • 3D model files: 74ahc2g00dc-etched.step / 74ahc2g00dc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74ahc2g00dc.step / 74ahc2g00dc.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (11 pp, sha256 d4b6de5e6cc25b32, retrieved 2026-10-18, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF