component

74AHC273PW

Public Made by Adom

by adom

Nexperia Flip Flops, TSSOP-20. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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3D Model

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Symbol & Footprint

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PCB Footprint

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Datasheet

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Contents

README

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74AHC273PW

Nexperia · Flip Flops · TSSOP-20

74AHC273PW from Nexperia, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 MR input Master reset input (active LOW); forces all Q outputs LOW regardless of clock and data inputs.
2 Q0 output Flip-flop output Q0; transfers D0 state on positive clock edge.
3 D0 input Data input D0; requires 3.0 ns setup time and 1.0 ns hold time.
4 D1 input Data input D1; requires 3.0 ns setup time and 1.0 ns hold time.
5 Q1 output Flip-flop output Q1; transfers D1 state on positive clock edge.
6 Q2 output Flip-flop output Q2; transfers D2 state on positive clock edge.
7 D2 input Data input D2; requires 3.0 ns setup time and 1.0 ns hold time.
8 D3 input Data input D3; requires 3.0 ns setup time and 1.0 ns hold time.
9 Q3 output Flip-flop output Q3; transfers D3 state on positive clock edge.
10 GND power_in Ground (0 V).
11 CP input Clock input; positive edge-triggered with 5.0 ns minimum pulse width.
12 Q4 output Flip-flop output Q4; transfers D4 state on positive clock edge.
13 D4 input Data input D4; requires 3.0 ns setup time and 1.0 ns hold time.
14 D5 input Data input D5; requires 3.0 ns setup time and 1.0 ns hold time.
15 Q5 output Flip-flop output Q5; transfers D5 state on positive clock edge.
16 Q6 output Flip-flop output Q6; transfers D6 state on positive clock edge.
17 D6 input Data input D6; requires 3.0 ns setup time and 1.0 ns hold time.
18 D7 input Data input D7; requires 3.0 ns setup time and 1.0 ns hold time.
19 Q7 output Flip-flop output Q7; transfers D7 state on positive clock edge.
20 VCC power_in Supply voltage; 2.0 to 5.5 V recommended operating range.

Key specifications

Parameter Value
Manufacturer Nexperia
Package TSSOP-20
Category Logic
Pins 20

CAD (KiCad official)

  • Symbol: 74AHC273PW
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: 74ahc273pw-etched.step / 74ahc273pw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74ahc273pw.step / 74ahc273pw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (16 pp, sha256 dfa9bcf88bfd3ff7, retrieved 2026-09-22, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF