component
74AHC1G04GW
Public Made by Adomby adom
Nexperia Inverters, SOT-353. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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74ahc1g04gw: laser-etched CAD + chip hero (factory 2.0.0 backfill)
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74AHC1G04GW
Nexperia · Inverters · SOT-353
74AHC1G04GW from Nexperia, in a SOT-353. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | n.c. | unconnected | Not connected. Pin is not internally bonded; leave floating or tie to a static net per board convention. |
| 2 | A | input | Data input to the inverter. CMOS switching thresholds referenced to VCC (VIH min = 0.7VCC typ; VIL max = 0.3VCC typ). Overvoltage tolerant to 5.5 V regardless of VCC. Input leakage typ 0.1 uA, input capacitance typ 1.5 pF. |
| 3 | GND | power_in | Ground reference, 0 V. All input/output voltages are referenced to this pin. Maximum ground current -75 mA. |
| 4 | Y | output | Data output; logical inversion of A (A=L -> Y=H, A=H -> Y=L). Push-pull CMOS output; typical VOH = VCC-0.1 V at IO=-50 uA; drives up to +/-8 mA at VCC=4.5 V. Maximum output current +/-25 mA per pin. |
| 5 | VCC | power_in | Positive supply voltage. Recommended operating range 2.0 V to 5.5 V (74AHC1G04). Absolute max +7.0 V. Typical quiescent supply current 1.0 uA at VCC = 5.5 V; max supply current rating 75 mA. Decouple with a local ceramic capacitor to GND. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOT-353 |
| Category | Logic |
| Pins | 5 |
Ordering variants
74AHC1G04GW74AHC1G04GWGV74AHC1G04GWGM
CAD (KiCad official)
- Symbol:
74AHC1G04GW - Footprint:
Package_TO_SOT_SMD:SOT-353_SC-70-5 - 3D model: SOT-353 (KiCad packages3D, STEP)
- 3D model files:
74ahc1g04gw-etched.step/74ahc1g04gw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74ahc1g04gw.step/74ahc1g04gw.glbare the bare package body.
3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
74ahc1g04gw.step |
87 KB | You want the bare part, or you mark your own boards. |
74ahc1g04gw-etched.step |
1.8 MB | You want the part with 74AHC1G04GW already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 468 faces against 102 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (12 pp, sha256
1eb71252d796cda1, retrieved 2026-08-17, tier: manufacturer) - Extractor:
ds2sf(Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 74AHC1G04GW
**Nexperia** · Inverters · SOT-353
74AHC1G04GW from Nexperia, in a SOT-353. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | n.c. | unconnected | Not connected. Pin is not internally bonded; leave floating or tie to a static net per board convention. |
| 2 | A | input | Data input to the inverter. CMOS switching thresholds referenced to VCC (VIH min = 0.7*VCC typ; VIL max = 0.3*VCC typ). Overvoltage tolerant to 5.5 V regardless of VCC. Input leakage typ 0.1 uA, input capacitance typ 1.5 pF. |
| 3 | GND | power_in | Ground reference, 0 V. All input/output voltages are referenced to this pin. Maximum ground current -75 mA. |
| 4 | Y | output | Data output; logical inversion of A (A=L -> Y=H, A=H -> Y=L). Push-pull CMOS output; typical VOH = VCC-0.1 V at IO=-50 uA; drives up to +/-8 mA at VCC=4.5 V. Maximum output current +/-25 mA per pin. |
| 5 | VCC | power_in | Positive supply voltage. Recommended operating range 2.0 V to 5.5 V (74AHC1G04). Absolute max +7.0 V. Typical quiescent supply current 1.0 uA at VCC = 5.5 V; max supply current rating 75 mA. Decouple with a local ceramic capacitor to GND. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOT-353 |
| Category | Logic |
| Pins | 5 |
## Ordering variants
- `74AHC1G04GW`
- `74AHC1G04GWGV`
- `74AHC1G04GWGM`
## CAD (KiCad official)
- Symbol: `74AHC1G04GW`
- Footprint: `Package_TO_SOT_SMD:SOT-353_SC-70-5`
- 3D model: SOT-353 (KiCad packages3D, STEP)
- 3D model files: `74ahc1g04gw-etched.step` / `74ahc1g04gw-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74ahc1g04gw.step` / `74ahc1g04gw.glb` are the bare package body.
## 3D model downloads
Two STEP files. Same geometry, different body top:
| File | Size | Use it when |
|---|---|---|
| [`74ahc1g04gw.step`](74ahc1g04gw.step) | 87 KB | You want the bare part, or you mark your own boards. |
| [`74ahc1g04gw-etched.step`](74ahc1g04gw-etched.step) | 1.8 MB | You want the part with `74AHC1G04GW` already on it. |
The marking in the etched file is real recessed geometry cut into the solid, not a
texture or a decal: 468 faces against 102 in the bare model. It
survives export, section views, and rendering in any CAD tool, and it drops straight
into KiCad or Fusion with no extra setup.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Nexperia datasheet](https://assets.nexperia.com/documents/data-sheet/74AHC1G04GW.pdf) (12 pp, sha256 `1eb71252d796cda1`, retrieved 2026-08-17, tier: manufacturer)
- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/74ahc1g04gw-datasheet.pdf)