component
74AHC1G00GV
Public Made by Adomby adom
TECH PUBLIC Logic Gates, SOT-23-5. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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74AHC1G00GV
TECH PUBLIC · Logic Gates · SOT-23-5
74AHC1G00GV from TECH PUBLIC, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Gate input A; recommended input voltage 0 to 5.5 V, with VIH min 1.5 V at VCC=2.0 V and VIL max 1.65 V at VCC=5.5 V. |
| 2 | B | input | Gate input B; recommended input voltage 0 to 5.5 V, with VIH min 1.5 V at VCC=2.0 V and VIL max 1.65 V at VCC=5.5 V. |
| 3 | GND | power_in | Ground reference; VCC or GND current is limited to ±50 mA. |
| 4 | Y | output | NAND output Y = NOT(A AND B); recommended IOH of -8 mA and IOL of 8 mA at VCC=5±0.5 V. |
| 5 | VCC | power_in | Supply voltage, recommended operating range 2 to 5.5 V with absolute maximum -0.5 to 7 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TECH PUBLIC |
| Package | SOT-23-5 |
| Category | Logic |
| Pins | 5 |
CAD (KiCad official)
- Symbol:
74AHC1G00GV - Footprint:
Package_TO_SOT_SMD:SOT-23-5 - 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files:
74ahc1g00gv-etched.step/74ahc1g00gv-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74ahc1g00gv.step/74ahc1g00gv.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TECH PUBLIC datasheet (6 pp, sha256
9585a079f2581a3c, retrieved 2026-10-18, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 74AHC1G00GV
**TECH PUBLIC** · Logic Gates · SOT-23-5
74AHC1G00GV from TECH PUBLIC, in a SOT-23-5. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A | input | Gate input A; recommended input voltage 0 to 5.5 V, with VIH min 1.5 V at VCC=2.0 V and VIL max 1.65 V at VCC=5.5 V. |
| 2 | B | input | Gate input B; recommended input voltage 0 to 5.5 V, with VIH min 1.5 V at VCC=2.0 V and VIL max 1.65 V at VCC=5.5 V. |
| 3 | GND | power_in | Ground reference; VCC or GND current is limited to ±50 mA. |
| 4 | Y | output | NAND output Y = NOT(A AND B); recommended IOH of -8 mA and IOL of 8 mA at VCC=5±0.5 V. |
| 5 | VCC | power_in | Supply voltage, recommended operating range 2 to 5.5 V with absolute maximum -0.5 to 7 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TECH PUBLIC |
| Package | SOT-23-5 |
| Category | Logic |
| Pins | 5 |
## CAD (KiCad official)
- Symbol: `74AHC1G00GV`
- Footprint: `Package_TO_SOT_SMD:SOT-23-5`
- 3D model: SOT-23-5 (KiCad packages3D, STEP)
- 3D model files: `74ahc1g00gv-etched.step` / `74ahc1g00gv-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74ahc1g00gv.step` / `74ahc1g00gv.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [TECH PUBLIC datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603358525934481408) (6 pp, sha256 `9585a079f2581a3c`, retrieved 2026-10-18, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/74ahc1g00gv-datasheet.pdf)