component
74AHC14PW
Public Made by Adomby adom
Nexperia Inverters, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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74AHC14PW
Nexperia · Inverters · TSSOP-14
74AHC14PW from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input of inverter 1 with Schmitt-trigger behaviour; overvoltage tolerant to 5.5 V. |
| 2 | 1Y | output | Data output of inverter 1, which is the logic inverse of input 1A per the function table. |
| 3 | 2A | input | Data input of inverter 2 with Schmitt-trigger behaviour; overvoltage tolerant to 5.5 V. |
| 4 | 2Y | output | Data output of inverter 2, which is the logic inverse of input 2A per the function table. |
| 5 | 3A | input | Data input of inverter 3 with Schmitt-trigger behaviour; overvoltage tolerant to 5.5 V. |
| 6 | 3Y | output | Data output of inverter 3, which is the logic inverse of input 3A per the function table. |
| 7 | GND | power_in | Ground (0 V) reference for all voltages in the datasheet. |
| 8 | 4Y | output | Data output of inverter 4, which is the logic inverse of input 4A per the function table. |
| 9 | 4A | input | Data input of inverter 4 with Schmitt-trigger behaviour; overvoltage tolerant to 5.5 V. |
| 10 | 5Y | output | Data output of inverter 5, which is the logic inverse of input 5A per the function table. |
| 11 | 5A | input | Data input of inverter 5 with Schmitt-trigger behaviour; overvoltage tolerant to 5.5 V. |
| 12 | 6Y | output | Data output of inverter 6, which is the logic inverse of input 6A per the function table. |
| 13 | 6A | input | Data input of inverter 6 with Schmitt-trigger behaviour; overvoltage tolerant to 5.5 V. |
| 14 | VCC | power_in | Supply voltage; 2.0 V to 5.5 V for 74AHC14 and 4.5 V to 5.5 V for 74AHCT14. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 7 | V | 3 | ||
| Input voltage | VI | -0.5 | 7 | V | 3 | ||
| Input clamping current | IIK | -20 | mA | VI < -0.5 V | 3 | ||
| Output clamping current | IOK | -20 | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 3 | |
| Output current | IO | -25 | 25 | mA | VO = -0.5 V to (VCC + 0.5 V) | 3 | |
| Supply current | ICC | 75 | mA | 3 | |||
| Ground current | IGND | -75 | mA | 3 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 3 | ||
| Total power dissipation | Ptot | 500 | mW | Tamb = -40 °C to +125 °C | 3 | ||
| Supply voltage (74AHC14) | VCC | 2 | 5 | 5.5 | V | 4 | |
| Input voltage | VI | 0 | 5.5 | V | 4 | ||
| Output voltage | VO | 0 | V | 4 | |||
| Ambient temperature | Tamb | -40 | 25 | 125 | °C | 4 | |
| HIGH-level output voltage | VOH | 1.9 | 2 | V | VI = VT+ or VT-; IO = -50 μA; VCC = 2.0 V | 4 | |
| HIGH-level output voltage | VOH | 2.9 | 3 | V | VI = VT+ or VT-; IO = -50 μA; VCC = 3.0 V | 4 | |
| HIGH-level output voltage | VOH | 4.4 | 4.5 | V | VI = VT+ or VT-; IO = -50 μA; VCC = 4.5 V | 4 | |
| HIGH-level output voltage | VOH | 2.58 | V | VI = VT+ or VT-; IO = -4.0 mA; VCC = 3.0 V | 4 | ||
| HIGH-level output voltage | VOH | 2.4 | V | -40 °C to +125 °C; VI = VT+ or VT-; IO = -4.0 mA; VCC = 3.0 V | 4 | ||
| HIGH-level output voltage | VOH | 3.94 | V | VI = VT+ or VT-; IO = -8.0 mA; VCC = 4.5 V | 4 | ||
| HIGH-level output voltage | VOH | 3.7 | V | -40 °C to +125 °C; VI = VT+ or VT-; IO = -8.0 mA; VCC = 4.5 V | 4 | ||
| LOW-level output voltage | VOL | 0 | 0.1 | V | VI = VT+ or VT-; IO = 50 μA; VCC = 2.0 V | 4 | |
| LOW-level output voltage | VOL | 0.36 | V | VI = VT+ or VT-; IO = 4.0 mA; VCC = 3.0 V | 4 | ||
| LOW-level output voltage | VOL | 0.55 | V | -40 °C to +125 °C; VI = VT+ or VT-; IO = 4.0 mA; VCC = 3.0 V | 4 | ||
| Input leakage current | II | 0.1 | μA | VI = 5.5 V or GND; VCC = 0 V to 5.5 V | 4 | ||
| Input leakage current | II | 2 | μA | -40 °C to +125 °C; VI = 5.5 V or GND; VCC = 0 V to 5.5 V | 4 | ||
| Supply current | ICC | 2 | μA | VI = VCC or GND; IO = 0 A; VCC = 5.5 V | 4 | ||
| Supply current | ICC | 40 | μA | -40 °C to +125 °C; VI = VCC or GND; IO = 0 A; VCC = 5.5 V | 4 | ||
| Input capacitance | CI | 3 | 10 | pF | 4 | ||
| Positive-going threshold voltage | VT+ | 2.2 | V | VCC = 3.0 V | 7 | ||
| Positive-going threshold voltage | VT+ | 3.15 | V | VCC = 4.5 V | 7 | ||
| Positive-going threshold voltage | VT+ | 3.85 | V | VCC = 5.5 V | 7 | ||
| Negative-going threshold voltage | VT- | 0.9 | V | VCC = 3.0 V | 7 | ||
| Negative-going threshold voltage | VT- | 1.35 | V | VCC = 4.5 V | 7 | ||
| Negative-going threshold voltage | VT- | 1.65 | V | VCC = 5.5 V | 7 | ||
| Hysteresis voltage | VH | 0.3 | 1.2 | V | VCC = 3.0 V | 7 | |
| Hysteresis voltage | VH | 0.25 | 1.2 | V | -40 °C to +125 °C; VCC = 3.0 V | 7 | |
| Hysteresis voltage | VH | 0.4 | 1.4 | V | VCC = 4.5 V | 7 | |
| Hysteresis voltage | VH | 0.35 | 1.4 | V | -40 °C to +125 °C; VCC = 4.5 V | 7 | |
| Hysteresis voltage | VH | 0.5 | 1.6 | V | VCC = 5.5 V | 7 | |
| Hysteresis voltage | VH | 0.45 | 1.6 | V | -40 °C to +125 °C; VCC = 5.5 V | 7 | |
| Propagation delay nA to nY | tpd | 4.3 | 12.8 | ns | see Fig. 4; VCC = 3.0 V to 3.6 V; CL = 15 pF | 5 | |
| Propagation delay nA to nY | tpd | 1 | 16 | ns | -40 °C to +125 °C; see Fig. 4; VCC = 3.0 V to 3.6 V; CL = 15 pF | 5 | |
| Propagation delay nA to nY | tpd | 5.8 | 16.3 | ns | see Fig. 4; VCC = 3.0 V to 3.6 V; CL = 50 pF | 5 | |
| Propagation delay nA to nY | tpd | 1 | 20.5 | ns | -40 °C to +125 °C; see Fig. 4; VCC = 3.0 V to 3.6 V; CL = 50 pF | 5 | |
| Propagation delay nA to nY | tpd | 3.2 | 8.6 | ns | see Fig. 4; VCC = 4.5 V to 5.5 V; CL = 15 pF | 5 | |
| Propagation delay nA to nY | tpd | 1 | 11 | ns | -40 °C to +125 °C; see Fig. 4; VCC = 4.5 V to 5.5 V; CL = 15 pF | 5 | |
| Propagation delay nA to nY | tpd | 4.2 | 10.6 | ns | see Fig. 4; VCC = 4.5 V to 5.5 V; CL = 50 pF | 5 | |
| Propagation delay nA to nY | tpd | 1 | 13.5 | ns | -40 °C to +125 °C; see Fig. 4; VCC = 4.5 V to 5.5 V; CL = 50 pF | 5 |
CAD (KiCad official)
- Symbol:
74AHC14PW - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
74ahc14pw-etched.step/74ahc14pw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74ahc14pw.step/74ahc14pw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (16 pp, sha256
4155d1136ca2efac, retrieved 2026-10-17, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 74AHC14PW
**Nexperia** · Inverters · TSSOP-14
74AHC14PW from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1A | input | Data input of inverter 1 with Schmitt-trigger behaviour; overvoltage tolerant to 5.5 V. |
| 2 | 1Y | output | Data output of inverter 1, which is the logic inverse of input 1A per the function table. |
| 3 | 2A | input | Data input of inverter 2 with Schmitt-trigger behaviour; overvoltage tolerant to 5.5 V. |
| 4 | 2Y | output | Data output of inverter 2, which is the logic inverse of input 2A per the function table. |
| 5 | 3A | input | Data input of inverter 3 with Schmitt-trigger behaviour; overvoltage tolerant to 5.5 V. |
| 6 | 3Y | output | Data output of inverter 3, which is the logic inverse of input 3A per the function table. |
| 7 | GND | power_in | Ground (0 V) reference for all voltages in the datasheet. |
| 8 | 4Y | output | Data output of inverter 4, which is the logic inverse of input 4A per the function table. |
| 9 | 4A | input | Data input of inverter 4 with Schmitt-trigger behaviour; overvoltage tolerant to 5.5 V. |
| 10 | 5Y | output | Data output of inverter 5, which is the logic inverse of input 5A per the function table. |
| 11 | 5A | input | Data input of inverter 5 with Schmitt-trigger behaviour; overvoltage tolerant to 5.5 V. |
| 12 | 6Y | output | Data output of inverter 6, which is the logic inverse of input 6A per the function table. |
| 13 | 6A | input | Data input of inverter 6 with Schmitt-trigger behaviour; overvoltage tolerant to 5.5 V. |
| 14 | VCC | power_in | Supply voltage; 2.0 V to 5.5 V for 74AHC14 and 4.5 V to 5.5 V for 74AHCT14. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | | 7 | V | | 3 |
| Input voltage | VI | -0.5 | | 7 | V | | 3 |
| Input clamping current | IIK | -20 | | | mA | VI < -0.5 V | 3 |
| Output clamping current | IOK | -20 | | 20 | mA | VO < -0.5 V or VO > VCC + 0.5 V | 3 |
| Output current | IO | -25 | | 25 | mA | VO = -0.5 V to (VCC + 0.5 V) | 3 |
| Supply current | ICC | | | 75 | mA | | 3 |
| Ground current | IGND | -75 | | | mA | | 3 |
| Storage temperature | Tstg | -65 | | 150 | °C | | 3 |
| Total power dissipation | Ptot | | | 500 | mW | Tamb = -40 °C to +125 °C | 3 |
| Supply voltage (74AHC14) | VCC | 2 | 5 | 5.5 | V | | 4 |
| Input voltage | VI | 0 | | 5.5 | V | | 4 |
| Output voltage | VO | 0 | | | V | | 4 |
| Ambient temperature | Tamb | -40 | 25 | 125 | °C | | 4 |
| HIGH-level output voltage | VOH | 1.9 | 2 | | V | VI = VT+ or VT-; IO = -50 μA; VCC = 2.0 V | 4 |
| HIGH-level output voltage | VOH | 2.9 | 3 | | V | VI = VT+ or VT-; IO = -50 μA; VCC = 3.0 V | 4 |
| HIGH-level output voltage | VOH | 4.4 | 4.5 | | V | VI = VT+ or VT-; IO = -50 μA; VCC = 4.5 V | 4 |
| HIGH-level output voltage | VOH | 2.58 | | | V | VI = VT+ or VT-; IO = -4.0 mA; VCC = 3.0 V | 4 |
| HIGH-level output voltage | VOH | 2.4 | | | V | -40 °C to +125 °C; VI = VT+ or VT-; IO = -4.0 mA; VCC = 3.0 V | 4 |
| HIGH-level output voltage | VOH | 3.94 | | | V | VI = VT+ or VT-; IO = -8.0 mA; VCC = 4.5 V | 4 |
| HIGH-level output voltage | VOH | 3.7 | | | V | -40 °C to +125 °C; VI = VT+ or VT-; IO = -8.0 mA; VCC = 4.5 V | 4 |
| LOW-level output voltage | VOL | | 0 | 0.1 | V | VI = VT+ or VT-; IO = 50 μA; VCC = 2.0 V | 4 |
| LOW-level output voltage | VOL | | | 0.36 | V | VI = VT+ or VT-; IO = 4.0 mA; VCC = 3.0 V | 4 |
| LOW-level output voltage | VOL | | | 0.55 | V | -40 °C to +125 °C; VI = VT+ or VT-; IO = 4.0 mA; VCC = 3.0 V | 4 |
| Input leakage current | II | | | 0.1 | μA | VI = 5.5 V or GND; VCC = 0 V to 5.5 V | 4 |
| Input leakage current | II | | | 2 | μA | -40 °C to +125 °C; VI = 5.5 V or GND; VCC = 0 V to 5.5 V | 4 |
| Supply current | ICC | | | 2 | μA | VI = VCC or GND; IO = 0 A; VCC = 5.5 V | 4 |
| Supply current | ICC | | | 40 | μA | -40 °C to +125 °C; VI = VCC or GND; IO = 0 A; VCC = 5.5 V | 4 |
| Input capacitance | CI | | 3 | 10 | pF | | 4 |
| Positive-going threshold voltage | VT+ | | | 2.2 | V | VCC = 3.0 V | 7 |
| Positive-going threshold voltage | VT+ | | | 3.15 | V | VCC = 4.5 V | 7 |
| Positive-going threshold voltage | VT+ | | | 3.85 | V | VCC = 5.5 V | 7 |
| Negative-going threshold voltage | VT- | 0.9 | | | V | VCC = 3.0 V | 7 |
| Negative-going threshold voltage | VT- | 1.35 | | | V | VCC = 4.5 V | 7 |
| Negative-going threshold voltage | VT- | 1.65 | | | V | VCC = 5.5 V | 7 |
| Hysteresis voltage | VH | 0.3 | | 1.2 | V | VCC = 3.0 V | 7 |
| Hysteresis voltage | VH | 0.25 | | 1.2 | V | -40 °C to +125 °C; VCC = 3.0 V | 7 |
| Hysteresis voltage | VH | 0.4 | | 1.4 | V | VCC = 4.5 V | 7 |
| Hysteresis voltage | VH | 0.35 | | 1.4 | V | -40 °C to +125 °C; VCC = 4.5 V | 7 |
| Hysteresis voltage | VH | 0.5 | | 1.6 | V | VCC = 5.5 V | 7 |
| Hysteresis voltage | VH | 0.45 | | 1.6 | V | -40 °C to +125 °C; VCC = 5.5 V | 7 |
| Propagation delay nA to nY | tpd | | 4.3 | 12.8 | ns | see Fig. 4; VCC = 3.0 V to 3.6 V; CL = 15 pF | 5 |
| Propagation delay nA to nY | tpd | 1 | | 16 | ns | -40 °C to +125 °C; see Fig. 4; VCC = 3.0 V to 3.6 V; CL = 15 pF | 5 |
| Propagation delay nA to nY | tpd | | 5.8 | 16.3 | ns | see Fig. 4; VCC = 3.0 V to 3.6 V; CL = 50 pF | 5 |
| Propagation delay nA to nY | tpd | 1 | | 20.5 | ns | -40 °C to +125 °C; see Fig. 4; VCC = 3.0 V to 3.6 V; CL = 50 pF | 5 |
| Propagation delay nA to nY | tpd | | 3.2 | 8.6 | ns | see Fig. 4; VCC = 4.5 V to 5.5 V; CL = 15 pF | 5 |
| Propagation delay nA to nY | tpd | 1 | | 11 | ns | -40 °C to +125 °C; see Fig. 4; VCC = 4.5 V to 5.5 V; CL = 15 pF | 5 |
| Propagation delay nA to nY | tpd | | 4.2 | 10.6 | ns | see Fig. 4; VCC = 4.5 V to 5.5 V; CL = 50 pF | 5 |
| Propagation delay nA to nY | tpd | 1 | | 13.5 | ns | -40 °C to +125 °C; see Fig. 4; VCC = 4.5 V to 5.5 V; CL = 50 pF | 5 |
## CAD (KiCad official)
- Symbol: `74AHC14PW`
- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`
- 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files: `74ahc14pw-etched.step` / `74ahc14pw-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74ahc14pw.step` / `74ahc14pw.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Nexperia datasheet](https://assets.nexperia.com/documents/data-sheet/74AHC14PW.pdf) (16 pp, sha256 `4155d1136ca2efac`, retrieved 2026-10-17, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/74ahc14pw-datasheet.pdf)