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74AHC139D

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Nexperia Signal Switches, Multiplexers, Decoders, SO-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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74AHC139D

Nexperia · Signal Switches, Multiplexers, Decoders · SO-16

74AHC139D from Nexperia, in a SO-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1E input Enable input for decoder 1, active LOW; when this input is HIGH all outputs 1Y0 to 1Y3 are forced HIGH.
2 1A0 input Binary-weighted address input (LSB) for decoder 1, decoded to mutually exclusive outputs 1Y0 to 1Y3.
3 1A1 input Binary-weighted address input (MSB) for decoder 1, decoded to mutually exclusive outputs 1Y0 to 1Y3.
4 1Y0 output Decoder 1 mutually exclusive output 0; output current limited to -25 mA to +25 mA per the limiting values.
5 1Y1 output Decoder 1 mutually exclusive output 1; output current limited to -25 mA to +25 mA per the limiting values.
6 1Y2 output Decoder 1 mutually exclusive output 2; output current limited to -25 mA to +25 mA per the limiting values.
7 1Y3 output Decoder 1 mutually exclusive output 3; output current limited to -25 mA to +25 mA per the limiting values.
8 GND power_in Ground (0 V) reference for all voltages on the device.
9 2Y3 output Decoder 2 mutually exclusive output 3; output current limited to -25 mA to +25 mA per the limiting values.
10 2Y2 output Decoder 2 mutually exclusive output 2; output current limited to -25 mA to +25 mA per the limiting values.
11 2Y1 output Decoder 2 mutually exclusive output 1; output current limited to -25 mA to +25 mA per the limiting values.
12 2Y0 output Decoder 2 mutually exclusive output 0; output current limited to -25 mA to +25 mA per the limiting values.
13 2A1 input Binary-weighted address input (MSB) for decoder 2, decoded to mutually exclusive outputs 2Y0 to 2Y3.
14 2A0 input Binary-weighted address input (LSB) for decoder 2, decoded to mutually exclusive outputs 2Y0 to 2Y3.
15 2E input Enable input for decoder 2, active LOW; when this input is HIGH all outputs 2Y0 to 2Y3 are forced HIGH.
16 VCC power_in Supply voltage; 2.0 V to 5.5 V for 74AHC139 and 4.5 V to 5.5 V for 74AHCT139 per the recommended operating conditions.

Key specifications

Parameter Value
Manufacturer Nexperia
Package SO-16
Category Logic
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Static: HIGH-level input voltage, VCC = 2.0 V VIH 1.5 V VCC = 2.0 V; Tamb -40 °C to +125 °C 5
Static: HIGH-level input voltage, VCC = 3.0 V VIH 2.1 V VCC = 3.0 V; Tamb -40 °C to +125 °C 5
Static: HIGH-level input voltage, VCC = 5.5 V VIH 3.85 V VCC = 5.5 V; Tamb -40 °C to +125 °C 5
Static: LOW-level input voltage, VCC = 2.0 V VIL 0.5 V VCC = 2.0 V; Tamb -40 °C to +125 °C 5
Static: LOW-level input voltage, VCC = 3.0 V VIL 0.9 V VCC = 3.0 V; Tamb -40 °C to +125 °C 5
Static: LOW-level input voltage, VCC = 5.5 V VIL 1.65 V VCC = 5.5 V; Tamb -40 °C to +125 °C 5
Static: HIGH-level output voltage, IO = -50 μA, VCC = 2.0 V VOH 1.9 2 V VI = VIH or VIL; IO = -50 μA; VCC = 2.0 V; Tamb -40 °C to +125 °C 5
Static: HIGH-level output voltage, IO = -50 μA, VCC = 3.0 V VOH 2.9 3 V VI = VIH or VIL; IO = -50 μA; VCC = 3.0 V; Tamb -40 °C to +125 °C 5
Static: HIGH-level output voltage, IO = -50 μA, VCC = 4.5 V VOH 4.4 4.5 V VI = VIH or VIL; IO = -50 μA; VCC = 4.5 V; Tamb -40 °C to +125 °C 5
Static: HIGH-level output voltage, IO = -4.0 mA, VCC = 3.0 V VOH 2.4 V VI = VIH or VIL; IO = -4.0 mA; VCC = 3.0 V; Tamb -40 °C to +125 °C 5
Static: HIGH-level output voltage, IO = -8.0 mA, VCC = 4.5 V VOH 3.7 V VI = VIH or VIL; IO = -8.0 mA; VCC = 4.5 V; Tamb -40 °C to +125 °C 5
Static: LOW-level output voltage, IO = 50 μA, VCC = 2.0 V VOL 0 0.1 V VI = VIH or VIL; IO = 50 μA; VCC = 2.0 V; Tamb -40 °C to +125 °C 5
Static: LOW-level output voltage, IO = 50 μA, VCC = 3.0 V VOL 0 0.1 V VI = VIH or VIL; IO = 50 μA; VCC = 3.0 V; Tamb -40 °C to +125 °C 5
Static: LOW-level output voltage, IO = 50 μA, VCC = 4.5 V VOL 0 0.1 V VI = VIH or VIL; IO = 50 μA; VCC = 4.5 V; Tamb -40 °C to +125 °C 5
Static: LOW-level output voltage, IO = 4.0 mA, VCC = 3.0 V VOL 0.55 V VI = VIH or VIL; IO = 4.0 mA; VCC = 3.0 V; Tamb -40 °C to +125 °C 5
Static: LOW-level output voltage, IO = 8.0 mA, VCC = 4.5 V VOL 0.55 V VI = VIH or VIL; IO = 8.0 mA; VCC = 4.5 V; Tamb -40 °C to +125 °C 5
Static: input leakage current II 2 μA VI = 5.5 V or GND; VCC = 0 V to 5.5 V; Tamb -40 °C to +125 °C 5
Static: supply current ICC 80 μA VI = VCC or GND; IO = 0 A; VCC = 5.5 V; Tamb -40 °C to +125 °C 5
Static: input capacitance CI 3 10 pF VI = VCC or GND; Tamb -40 °C to +125 °C 5
Dynamic: propagation delay nAn to nYn, CL = 15 pF tpd 1 5.5 14 ns VCC = 3.0 V to 3.6 V; CL = 15 pF; nAn to nYn; Tamb -40 °C to +125 °C 7
Dynamic: propagation delay nAn to nYn, CL = 50 pF tpd 1 7.9 18.5 ns VCC = 3.0 V to 3.6 V; CL = 50 pF; nAn to nYn; Tamb -40 °C to +125 °C 7
Dynamic: propagation delay nAn to nYn, CL = 15 pF tpd 1 3.9 9 ns VCC = 4.5 V to 5.5 V; CL = 15 pF; nAn to nYn; Tamb -40 °C to +125 °C 7
Dynamic: propagation delay nAn to nYn, CL = 50 pF tpd 1 5.6 11.5 ns VCC = 4.5 V to 5.5 V; CL = 50 pF; nAn to nYn; Tamb -40 °C to +125 °C 7
Dynamic: propagation delay nE to nYn, CL = 15 pF tpd 1 4.8 11.5 ns VCC = 3.0 V to 3.6 V; CL = 15 pF; nE to nYn; Tamb -40 °C to +125 °C 7
Dynamic: propagation delay nE to nYn, CL = 50 pF tpd 1 6.9 16 ns VCC = 3.0 V to 3.6 V; CL = 50 pF; nE to nYn; Tamb -40 °C to +125 °C 7
Dynamic: propagation delay nE to nYn, CL = 15 pF tpd 1 3.4 8 ns VCC = 4.5 V to 5.5 V; CL = 15 pF; nE to nYn; Tamb -40 °C to +125 °C 7
Dynamic: propagation delay nE to nYn, CL = 50 pF tpd 1 4.9 10.5 ns VCC = 4.5 V to 5.5 V; CL = 50 pF; nE to nYn; Tamb -40 °C to +125 °C 7
Supply voltage VCC 2 5 5.5 V 74AHC139 4
Input voltage VI 0 5.5 V 4
Output voltage VO 0 V max = VCC 4
Ambient temperature Tamb -40 25 125 °C 4
Input transition rise and fall rate Δt/ΔV 100 ns/V VCC = 3.0 V to 3.6 V 4
Input transition rise and fall rate Δt/ΔV 20 ns/V VCC = 4.5 V to 5.5 V 4
Supply voltage (absolute maximum) VCC -0.5 7 V 4
Input voltage (absolute maximum) VI -0.5 7 V 4
Input clamping current IIK -20 mA VI < -0.5 V 4
Output clamping current IOK -20 20 mA VO < -0.5 V or VO > VCC + 0.5 V 4
Output current IO -25 25 mA VO = -0.5 V to (VCC + 0.5 V) 4
Supply current ICC 75 mA 4
Ground current IGND -75 mA 4
Storage temperature Tstg -65 150 °C 4
Total power dissipation Ptot 500 mW Tamb = -40 °C to +125 °C 4

CAD (KiCad official)

  • Symbol: 74AHC139D
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SO-16 (KiCad packages3D, STEP)
  • 3D model files: 74ahc139d-etched.step / 74ahc139d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74ahc139d.step / 74ahc139d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (14 pp, sha256 fc7e24dfc738e83f, retrieved 2026-10-21, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF