component
74AHC138D
Public Made by Adomby adom
Nexperia Signal Switches, Multiplexers, Decoders, SO-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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74AHC138D
Nexperia · Signal Switches, Multiplexers, Decoders · SO-16
74AHC138D from Nexperia, in a SO-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Binary-weighted address input A0 for the 3-to-8 decoder, which selects one of the eight mutually exclusive outputs when enabled. |
| 2 | A1 | input | Binary-weighted address input A1 for the 3-to-8 decoder, which selects one of the eight mutually exclusive outputs when enabled. |
| 3 | A2 | input | Binary-weighted address input A2 for the 3-to-8 decoder, which selects one of the eight mutually exclusive outputs when enabled. |
| 4 | E1 | input | Active-LOW enable input E1; all outputs stay HIGH unless E1 and E2 are LOW and E3 is HIGH. |
| 5 | E2 | input | Active-LOW enable input E2; all outputs stay HIGH unless E1 and E2 are LOW and E3 is HIGH. |
| 6 | E3 | input | Active-HIGH enable input E3; all outputs stay HIGH unless E1 and E2 are LOW and E3 is HIGH. |
| 7 | Y7 | output | Decoder output Y7, which is LOW when selected and HIGH otherwise. |
| 8 | GND | power_in | Ground pin (0 V) that serves as the voltage reference for all voltages on the device. |
| 9 | Y6 | output | Decoder output Y6, which is LOW when selected and HIGH otherwise. |
| 10 | Y5 | output | Decoder output Y5, which is LOW when selected and HIGH otherwise. |
| 11 | Y4 | output | Decoder output Y4, which is LOW when selected and HIGH otherwise. |
| 12 | Y3 | output | Decoder output Y3, which is LOW when selected and HIGH otherwise. |
| 13 | Y2 | output | Decoder output Y2, which is LOW when selected and HIGH otherwise. |
| 14 | Y1 | output | Decoder output Y1, which is LOW when selected and HIGH otherwise. |
| 15 | Y0 | output | Decoder output Y0, which is LOW when selected and HIGH otherwise. |
| 16 | VCC | power_in | Supply voltage pin; recommended operating range is 2.0 V to 5.5 V for 74AHC138. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SO-16 |
| Category | Logic |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC supply voltage | VCC | -0.5 | 7 | V | 4 | ||
| VI input voltage | VI | -0.5 | 7 | V | 4 | ||
| input clamping current | IIK | -20 | mA | VI < 0.5 V | 4 | ||
| output clamping current | IOK | 20 | mA | VO < 0.5 V or VO > VCC + 0.5 V | 4 | ||
| output current | IO | 25 | mA | VO = 0.5 V to (VCC + 0.5 V) | 4 | ||
| supply current | ICC | 75 | mA | 4 | |||
| ground current | IGND | -75 | mA | 4 | |||
| storage temperature | Tstg | -65 | 150 | C | 4 | ||
| total power dissipation | Ptot | 500 | mW | Tamb = -40 C to +125 C; SO16 package | 4 | ||
| VCC supply voltage | VCC | 2 | 5 | 5.5 | V | 5 | |
| VI input voltage | VI | 0 | 5.5 | V | 5 | ||
| VO output voltage | VO | 0 | V | 5 | |||
| ambient temperature | Tamb | -40 | 25 | 125 | C | 5 | |
| input transition rise and fall rate | t/V | 100 | ns/V | VCC = 3.3 V 0.3 V | 5 | ||
| input transition rise and fall rate | t/V | 20 | ns/V | VCC = 5.0 V 0.5 V | 5 | ||
| HIGH-level input voltage | VIH | 1.5 | V | VCC = 2.0 V | 5 | ||
| HIGH-level input voltage | VIH | 2.1 | V | VCC = 3.0 V | 5 | ||
| HIGH-level input voltage | VIH | 3.85 | V | VCC = 5.5 V | 5 | ||
| LOW-level input voltage | VIL | 0.5 | V | VCC = 2.0 V | 5 | ||
| LOW-level input voltage | VIL | 0.9 | V | VCC = 3.0 V | 5 | ||
| LOW-level input voltage | VIL | 1.65 | V | VCC = 5.5 V | 5 | ||
| HIGH-level output voltage | VOH | 1.9 | 2 | V | VI = VIH or VIL; IO = 50 A; VCC = 2.0 V | 5 | |
| HIGH-level output voltage | VOH | 2.9 | 3 | V | VI = VIH or VIL; IO = 50 A; VCC = 3.0 V | 5 | |
| HIGH-level output voltage | VOH | 4.4 | 4.5 | V | VI = VIH or VIL; IO = 50 A; VCC = 4.5 V | 5 | |
| HIGH-level output voltage | VOH | 2.4 | V | VI = VIH or VIL; IO = 4.0 mA; VCC = 3.0 V | 5 | ||
| HIGH-level output voltage | VOH | 3.7 | V | VI = VIH or VIL; IO = 8.0 mA; VCC = 4.5 V | 5 | ||
| LOW-level output voltage | VOL | 0 | 0.1 | V | VI = VIH or VIL; IO = 50 A; VCC = 2.0 V | 5 | |
| LOW-level output voltage | VOL | 0.55 | V | VI = VIH or VIL; IO = 4.0 mA; VCC = 3.0 V | 5 | ||
| input leakage current | II | 2 | A | VI = 5.5 V or GND; VCC = 0 V or 5.5 V | 5 | ||
| supply current | ICC | 80 | A | VI = VCC or GND; IO = 0 A; VCC = 5.5 V | 5 | ||
| input capacitance | CI | 3 | 10 | pF | 5 | ||
| propagation delay An to Yn | tpd | 1 | 6 | 14.5 | ns | An to Yn; VCC = 3.0 V to 3.6 V; CL = 15 pF | 7 |
| propagation delay An to Yn | tpd | 1 | 8.6 | 20 | ns | An to Yn; VCC = 3.0 V to 3.6 V; CL = 50 pF | 7 |
| propagation delay An to Yn | tpd | 1 | 4.4 | 10.5 | ns | An to Yn; VCC = 4.5 V to 5.5 V; CL = 15 pF | 7 |
| propagation delay An to Yn | tpd | 1 | 6.3 | 13 | ns | An to Yn; VCC = 4.5 V to 5.5 V; CL = 50 pF | 7 |
| propagation delay E3 to Yn | tpd | 1 | 5.8 | 16 | ns | E3 to Yn; VCC = 3.0 V to 3.6 V; CL = 15 pF | 7 |
| propagation delay E3 to Yn | tpd | 1 | 8.2 | 20.5 | ns | E3 to Yn; VCC = 3.0 V to 3.6 V; CL = 50 pF | 7 |
| propagation delay E3 to Yn | tpd | 1 | 4.2 | 10.5 | ns | E3 to Yn; VCC = 4.5 V to 5.5 V; CL = 15 pF | 7 |
| propagation delay E3 to Yn | tpd | 1 | 6 | 13 | ns | E3 to Yn; VCC = 4.5 V to 5.5 V; CL = 50 pF | 7 |
| propagation delay E1, E2 to Yn | tpd | 1 | 5.7 | 14.5 | ns | E1, E2 to Yn; VCC = 3.0 V to 3.6 V; CL = 15 pF | 7 |
| propagation delay E1, E2 to Yn | tpd | 1 | 8.2 | 19 | ns | E1, E2 to Yn; VCC = 3.0 V to 3.6 V; CL = 50 pF | 7 |
| propagation delay E1, E2 to Yn | tpd | 1 | 4.2 | 10.5 | ns | E1, E2 to Yn; VCC = 4.5 V to 5.5 V; CL = 15 pF | 7 |
| propagation delay E1, E2 to Yn | tpd | 1 | 6 | 13 | ns | E1, E2 to Yn; VCC = 4.5 V to 5.5 V; CL = 50 pF | 7 |
CAD (KiCad official)
- Symbol:
74AHC138D - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SO-16 (KiCad packages3D, STEP)
- 3D model files:
74ahc138d-etched.step/74ahc138d-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74ahc138d.step/74ahc138d.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (17 pp, sha256
63520b5b696b050e, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusoff(skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 74AHC138D
**Nexperia** · Signal Switches, Multiplexers, Decoders · SO-16
74AHC138D from Nexperia, in a SO-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Binary-weighted address input A0 for the 3-to-8 decoder, which selects one of the eight mutually exclusive outputs when enabled. |
| 2 | A1 | input | Binary-weighted address input A1 for the 3-to-8 decoder, which selects one of the eight mutually exclusive outputs when enabled. |
| 3 | A2 | input | Binary-weighted address input A2 for the 3-to-8 decoder, which selects one of the eight mutually exclusive outputs when enabled. |
| 4 | E1 | input | Active-LOW enable input E1; all outputs stay HIGH unless E1 and E2 are LOW and E3 is HIGH. |
| 5 | E2 | input | Active-LOW enable input E2; all outputs stay HIGH unless E1 and E2 are LOW and E3 is HIGH. |
| 6 | E3 | input | Active-HIGH enable input E3; all outputs stay HIGH unless E1 and E2 are LOW and E3 is HIGH. |
| 7 | Y7 | output | Decoder output Y7, which is LOW when selected and HIGH otherwise. |
| 8 | GND | power_in | Ground pin (0 V) that serves as the voltage reference for all voltages on the device. |
| 9 | Y6 | output | Decoder output Y6, which is LOW when selected and HIGH otherwise. |
| 10 | Y5 | output | Decoder output Y5, which is LOW when selected and HIGH otherwise. |
| 11 | Y4 | output | Decoder output Y4, which is LOW when selected and HIGH otherwise. |
| 12 | Y3 | output | Decoder output Y3, which is LOW when selected and HIGH otherwise. |
| 13 | Y2 | output | Decoder output Y2, which is LOW when selected and HIGH otherwise. |
| 14 | Y1 | output | Decoder output Y1, which is LOW when selected and HIGH otherwise. |
| 15 | Y0 | output | Decoder output Y0, which is LOW when selected and HIGH otherwise. |
| 16 | VCC | power_in | Supply voltage pin; recommended operating range is 2.0 V to 5.5 V for 74AHC138. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SO-16 |
| Category | Logic |
| Pins | 16 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| VCC supply voltage | VCC | -0.5 | | 7 | V | | 4 |
| VI input voltage | VI | -0.5 | | 7 | V | | 4 |
| input clamping current | IIK | -20 | | | mA | VI < 0.5 V | 4 |
| output clamping current | IOK | | | 20 | mA | VO < 0.5 V or VO > VCC + 0.5 V | 4 |
| output current | IO | | | 25 | mA | VO = 0.5 V to (VCC + 0.5 V) | 4 |
| supply current | ICC | | | 75 | mA | | 4 |
| ground current | IGND | -75 | | | mA | | 4 |
| storage temperature | Tstg | -65 | | 150 | C | | 4 |
| total power dissipation | Ptot | | | 500 | mW | Tamb = -40 C to +125 C; SO16 package | 4 |
| VCC supply voltage | VCC | 2 | 5 | 5.5 | V | | 5 |
| VI input voltage | VI | 0 | | 5.5 | V | | 5 |
| VO output voltage | VO | 0 | | | V | | 5 |
| ambient temperature | Tamb | -40 | 25 | 125 | C | | 5 |
| input transition rise and fall rate | t/V | | | 100 | ns/V | VCC = 3.3 V 0.3 V | 5 |
| input transition rise and fall rate | t/V | | | 20 | ns/V | VCC = 5.0 V 0.5 V | 5 |
| HIGH-level input voltage | VIH | 1.5 | | | V | VCC = 2.0 V | 5 |
| HIGH-level input voltage | VIH | 2.1 | | | V | VCC = 3.0 V | 5 |
| HIGH-level input voltage | VIH | 3.85 | | | V | VCC = 5.5 V | 5 |
| LOW-level input voltage | VIL | | | 0.5 | V | VCC = 2.0 V | 5 |
| LOW-level input voltage | VIL | | | 0.9 | V | VCC = 3.0 V | 5 |
| LOW-level input voltage | VIL | | | 1.65 | V | VCC = 5.5 V | 5 |
| HIGH-level output voltage | VOH | 1.9 | 2 | | V | VI = VIH or VIL; IO = 50 A; VCC = 2.0 V | 5 |
| HIGH-level output voltage | VOH | 2.9 | 3 | | V | VI = VIH or VIL; IO = 50 A; VCC = 3.0 V | 5 |
| HIGH-level output voltage | VOH | 4.4 | 4.5 | | V | VI = VIH or VIL; IO = 50 A; VCC = 4.5 V | 5 |
| HIGH-level output voltage | VOH | 2.4 | | | V | VI = VIH or VIL; IO = 4.0 mA; VCC = 3.0 V | 5 |
| HIGH-level output voltage | VOH | 3.7 | | | V | VI = VIH or VIL; IO = 8.0 mA; VCC = 4.5 V | 5 |
| LOW-level output voltage | VOL | | 0 | 0.1 | V | VI = VIH or VIL; IO = 50 A; VCC = 2.0 V | 5 |
| LOW-level output voltage | VOL | | | 0.55 | V | VI = VIH or VIL; IO = 4.0 mA; VCC = 3.0 V | 5 |
| input leakage current | II | | | 2 | A | VI = 5.5 V or GND; VCC = 0 V or 5.5 V | 5 |
| supply current | ICC | | | 80 | A | VI = VCC or GND; IO = 0 A; VCC = 5.5 V | 5 |
| input capacitance | CI | | 3 | 10 | pF | | 5 |
| propagation delay An to Yn | tpd | 1 | 6 | 14.5 | ns | An to Yn; VCC = 3.0 V to 3.6 V; CL = 15 pF | 7 |
| propagation delay An to Yn | tpd | 1 | 8.6 | 20 | ns | An to Yn; VCC = 3.0 V to 3.6 V; CL = 50 pF | 7 |
| propagation delay An to Yn | tpd | 1 | 4.4 | 10.5 | ns | An to Yn; VCC = 4.5 V to 5.5 V; CL = 15 pF | 7 |
| propagation delay An to Yn | tpd | 1 | 6.3 | 13 | ns | An to Yn; VCC = 4.5 V to 5.5 V; CL = 50 pF | 7 |
| propagation delay E3 to Yn | tpd | 1 | 5.8 | 16 | ns | E3 to Yn; VCC = 3.0 V to 3.6 V; CL = 15 pF | 7 |
| propagation delay E3 to Yn | tpd | 1 | 8.2 | 20.5 | ns | E3 to Yn; VCC = 3.0 V to 3.6 V; CL = 50 pF | 7 |
| propagation delay E3 to Yn | tpd | 1 | 4.2 | 10.5 | ns | E3 to Yn; VCC = 4.5 V to 5.5 V; CL = 15 pF | 7 |
| propagation delay E3 to Yn | tpd | 1 | 6 | 13 | ns | E3 to Yn; VCC = 4.5 V to 5.5 V; CL = 50 pF | 7 |
| propagation delay E1, E2 to Yn | tpd | 1 | 5.7 | 14.5 | ns | E1, E2 to Yn; VCC = 3.0 V to 3.6 V; CL = 15 pF | 7 |
| propagation delay E1, E2 to Yn | tpd | 1 | 8.2 | 19 | ns | E1, E2 to Yn; VCC = 3.0 V to 3.6 V; CL = 50 pF | 7 |
| propagation delay E1, E2 to Yn | tpd | 1 | 4.2 | 10.5 | ns | E1, E2 to Yn; VCC = 4.5 V to 5.5 V; CL = 15 pF | 7 |
| propagation delay E1, E2 to Yn | tpd | 1 | 6 | 13 | ns | E1, E2 to Yn; VCC = 4.5 V to 5.5 V; CL = 50 pF | 7 |
## CAD (KiCad official)
- Symbol: `74AHC138D`
- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`
- 3D model: SO-16 (KiCad packages3D, STEP)
- 3D model files: `74ahc138d-etched.step` / `74ahc138d-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74ahc138d.step` / `74ahc138d.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Nexperia datasheet](https://assets.nexperia.com/documents/data-sheet/74AHC138D.pdf) (17 pp, sha256 `63520b5b696b050e`, retrieved 2026-10-27, tier: manufacturer)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `off` (skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/74ahc138d-datasheet.pdf)