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Contents

README

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74AHC132PW

Nexperia · Logic Gates · TSSOP-14

74AHC132PW from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Data input A of gate 1; Schmitt-trigger input, overvoltage tolerant to 5.5 V.
2 1B input Data input B of gate 1; Schmitt-trigger input, overvoltage tolerant to 5.5 V.
3 1Y output Data output Y of gate 1, the NAND of inputs 1A and 1B.
4 2A input Data input A of gate 2; Schmitt-trigger input, overvoltage tolerant to 5.5 V.
5 2B input Data input B of gate 2; Schmitt-trigger input, overvoltage tolerant to 5.5 V.
6 2Y output Data output Y of gate 2, the NAND of inputs 2A and 2B.
7 GND power_in Ground (0 V); not a ground pin on the BQ package, but a ground on this PW package.
8 3Y output Data output Y of gate 3, the NAND of inputs 3A and 3B.
9 3A input Data input A of gate 3; Schmitt-trigger input, overvoltage tolerant to 5.5 V.
10 3B input Data input B of gate 3; Schmitt-trigger input, overvoltage tolerant to 5.5 V.
11 4Y output Data output Y of gate 4, the NAND of inputs 4A and 4B.
12 4A input Data input A of gate 4; Schmitt-trigger input, overvoltage tolerant to 5.5 V.
13 4B input Data input B of gate 4; Schmitt-trigger input, overvoltage tolerant to 5.5 V.
14 VCC power_in Supply voltage; 2.0 V to 5.5 V for 74AHC132 and 4.5 V to 5.5 V for 74AHCT132.

Key specifications

Parameter Value
Manufacturer Nexperia
Package TSSOP-14
Category Logic
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC -0.5 7 V 4
Input voltage VI -0.5 7 V 4
Input clamping current IIK -20 mA VI < -0.5 V 4
Output clamping current IOK -20 20 mA VO < -0.5 V or VO > VCC + 0.5 V 4
Output current IO -25 25 mA VO = -0.5 V to (VCC + 0.5 V) 4
Supply current ICC 75 mA 4
Ground current IGND -75 mA 4
Storage temperature Tstg -65 150 °C 4
Total power dissipation Ptot 500 mW Tamb = -40 °C to +125 °C 4
Supply voltage VCC 2 5 5.5 V 4
Input voltage VI 0 5.5 V 4
Output voltage VO 0 V 4
Ambient temperature Tamb -40 25 125 °C 4
Input transition rise and fall rate Δt/ΔV 100 ns/V VCC = 3.3 V ± 0.3 V 4
Input transition rise and fall rate Δt/ΔV 20 ns/V VCC = 5.0 V ± 0.5 V 4
HIGH-level output voltage VOH 1.9 2 V VI = VT+ or VT-; IO = -50 μA; VCC = 2.0 V 5
HIGH-level output voltage VOH 2.9 3 V VI = VT+ or VT-; IO = -50 μA; VCC = 3.0 V 5
HIGH-level output voltage VOH 4.4 4.5 V VI = VT+ or VT-; IO = -50 μA; VCC = 4.5 V 5
HIGH-level output voltage VOH 2.58 V VI = VT+ or VT-; IO = -4.0 mA; VCC = 3.0 V 5
HIGH-level output voltage VOH 3.94 V VI = VT+ or VT-; IO = -8.0 mA; VCC = 4.5 V 5
LOW-level output voltage VOL 0 0.1 V VI = VT+ or VT-; IO = 50 μA; VCC = 2.0 V 5
LOW-level output voltage VOL 0.36 V VI = VT+ or VT-; IO = 4.0 mA; VCC = 3.0 V 5
Input leakage current II 0.1 μA VI = 5.5 V or GND; VCC = 0 V to 5.5 V 5
Supply current ICC 2 μA VI = VCC or GND; IO = 0 A; VCC = 5.5 V 5
Input capacitance CI 3 10 pF VI = VCC or GND 5
Propagation delay tpd 4.4 11.9 ns VCC = 3.0 V to 3.6 V; CL = 15 pF; see Fig. 4 6
Propagation delay tpd 6.2 15.4 ns VCC = 3.0 V to 3.6 V; CL = 50 pF; see Fig. 4 6
Propagation delay tpd 3.3 7.7 ns VCC = 4.5 V to 5.5 V; CL = 15 pF; see Fig. 4 6
Propagation delay tpd 4.7 9.7 ns VCC = 4.5 V to 5.5 V; CL = 50 pF; see Fig. 4 6
Propagation delay (-40 °C to +125 °C) tpd 1 15 ns VCC = 3.0 V to 3.6 V; CL = 15 pF; see Fig. 4 6
Propagation delay (-40 °C to +125 °C) tpd 1 19.5 ns VCC = 3.0 V to 3.6 V; CL = 50 pF; see Fig. 4 6
Propagation delay (-40 °C to +125 °C) tpd 1 10 ns VCC = 4.5 V to 5.5 V; CL = 15 pF; see Fig. 4 6
Propagation delay (-40 °C to +125 °C) tpd 1 12.5 ns VCC = 4.5 V to 5.5 V; CL = 50 pF; see Fig. 4 6
Positive-going threshold voltage VT+ 2.2 V VCC = 3.0 V 8
Positive-going threshold voltage VT+ 3.15 V VCC = 4.5 V 8
Positive-going threshold voltage VT+ 3.85 V VCC = 5.5 V 8
Negative-going threshold voltage VT- 0.9 V VCC = 3.0 V 8
Negative-going threshold voltage VT- 1.35 V VCC = 4.5 V 8
Negative-going threshold voltage VT- 1.65 V VCC = 5.5 V 8
Hysteresis voltage VH 0.3 1.2 V VCC = 3.0 V 8
Hysteresis voltage VH 0.4 1.4 V VCC = 4.5 V 8
Hysteresis voltage VH 0.5 1.6 V VCC = 5.5 V 8
Positive-going threshold voltage (-40 °C to +125 °C) VT+ 2.2 V VCC = 3.0 V 8
Positive-going threshold voltage (-40 °C to +125 °C) VT+ 3.15 V VCC = 4.5 V 8
Positive-going threshold voltage (-40 °C to +125 °C) VT+ 3.85 V VCC = 5.5 V 8
Negative-going threshold voltage (-40 °C to +125 °C) VT- 0.9 V VCC = 3.0 V 8
Negative-going threshold voltage (-40 °C to +125 °C) VT- 1.35 V VCC = 4.5 V 8
Negative-going threshold voltage (-40 °C to +125 °C) VT- 1.65 V VCC = 5.5 V 8
Hysteresis voltage (-40 °C to +125 °C) VH 0.25 1.2 V VCC = 3.0 V 8
Hysteresis voltage (-40 °C to +125 °C) VH 0.35 1.4 V VCC = 4.5 V 8
Hysteresis voltage (-40 °C to +125 °C) VH 0.45 1.6 V VCC = 5.5 V 8

CAD (KiCad official)

  • Symbol: 74AHC132PW
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: 74ahc132pw-etched.step / 74ahc132pw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74ahc132pw.step / 74ahc132pw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (16 pp, sha256 8ea2c6812c0971c8, retrieved 2026-10-21, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus off (skipped (clean text read)), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF