component
74AHC125PW
Public Made by Adomby adom
Nexperia Buffers, Drivers, Receivers, Transceivers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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74AHC125PW
Nexperia · Buffers, Drivers, Receivers, Transceivers · TSSOP-14
74AHC125PW from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Active-LOW output enable for gate 1; a HIGH level forces output 1Y into the high-impedance OFF-state. |
| 2 | 1A | input | Data input for buffer 1; it is passed to 1Y when 1OE is LOW, and inputs are overvoltage tolerant to 5.5 V. |
| 3 | 1Y | output | Data output of buffer 1; it is high-impedance (Z) while 1OE is HIGH. |
| 4 | 2OE | input | Active-LOW output enable for gate 2; a HIGH level forces output 2Y into the high-impedance OFF-state. |
| 5 | 2A | input | Data input for buffer 2; it is passed to 2Y when 2OE is LOW, and inputs are overvoltage tolerant to 5.5 V. |
| 6 | 2Y | output | Data output of buffer 2; it is high-impedance (Z) while 2OE is HIGH. |
| 7 | GND | power_in | Ground (0 V) reference for all voltages on the device. |
| 8 | 3Y | output | Data output of buffer 3; it is high-impedance (Z) while 3OE is HIGH. |
| 9 | 3A | input | Data input for buffer 3; it is passed to 3Y when 3OE is LOW, and inputs are overvoltage tolerant to 5.5 V. |
| 10 | 3OE | input | Active-LOW output enable for gate 3; a HIGH level forces output 3Y into the high-impedance OFF-state. |
| 11 | 4Y | output | Data output of buffer 4; it is high-impedance (Z) while 4OE is HIGH. |
| 12 | 4A | input | Data input for buffer 4; it is passed to 4Y when 4OE is LOW, and inputs are overvoltage tolerant to 5.5 V. |
| 13 | 4OE | input | Active-LOW output enable for gate 4; a HIGH level forces output 4Y into the high-impedance OFF-state. |
| 14 | VCC | power_in | Supply voltage: 2.0 V to 5.5 V for 74AHC125PW and 4.5 V to 5.5 V for 74AHCT125PW. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
CAD (KiCad official)
- Symbol:
74AHC125PW - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
74ahc125pw-etched.step/74ahc125pw-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74ahc125pw.step/74ahc125pw.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (15 pp, sha256
6916d6b233c618f4, retrieved 2026-10-09, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 74AHC125PW
**Nexperia** · Buffers, Drivers, Receivers, Transceivers · TSSOP-14
74AHC125PW from Nexperia, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Active-LOW output enable for gate 1; a HIGH level forces output 1Y into the high-impedance OFF-state. |
| 2 | 1A | input | Data input for buffer 1; it is passed to 1Y when 1OE is LOW, and inputs are overvoltage tolerant to 5.5 V. |
| 3 | 1Y | output | Data output of buffer 1; it is high-impedance (Z) while 1OE is HIGH. |
| 4 | 2OE | input | Active-LOW output enable for gate 2; a HIGH level forces output 2Y into the high-impedance OFF-state. |
| 5 | 2A | input | Data input for buffer 2; it is passed to 2Y when 2OE is LOW, and inputs are overvoltage tolerant to 5.5 V. |
| 6 | 2Y | output | Data output of buffer 2; it is high-impedance (Z) while 2OE is HIGH. |
| 7 | GND | power_in | Ground (0 V) reference for all voltages on the device. |
| 8 | 3Y | output | Data output of buffer 3; it is high-impedance (Z) while 3OE is HIGH. |
| 9 | 3A | input | Data input for buffer 3; it is passed to 3Y when 3OE is LOW, and inputs are overvoltage tolerant to 5.5 V. |
| 10 | 3OE | input | Active-LOW output enable for gate 3; a HIGH level forces output 3Y into the high-impedance OFF-state. |
| 11 | 4Y | output | Data output of buffer 4; it is high-impedance (Z) while 4OE is HIGH. |
| 12 | 4A | input | Data input for buffer 4; it is passed to 4Y when 4OE is LOW, and inputs are overvoltage tolerant to 5.5 V. |
| 13 | 4OE | input | Active-LOW output enable for gate 4; a HIGH level forces output 4Y into the high-impedance OFF-state. |
| 14 | VCC | power_in | Supply voltage: 2.0 V to 5.5 V for 74AHC125PW and 4.5 V to 5.5 V for 74AHCT125PW. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
## CAD (KiCad official)
- Symbol: `74AHC125PW`
- Footprint: `Package_SO:TSSOP-14_4.4x5mm_P0.65mm`
- 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files: `74ahc125pw-etched.step` / `74ahc125pw-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `74ahc125pw.step` / `74ahc125pw.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Nexperia datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588908286204104704) (15 pp, sha256 `6916d6b233c618f4`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/74ahc125pw-datasheet.pdf)