component

74AHC04BQ

Public Made by Adom

by adom

Nexperia Inverters, DHVQFN-14-EP(2.5x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentlogic74ahc04bqfactory-2.0.0extractor-text
Overview Files Discover Packages Releases Dependencies Issues Breadcrumbs Pull Requests Activity
main
Download ZIP Propose a change
Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 5d ago
viewers 74ahc04bq: viewers · Ray 5d ago
74ahc04bq-etched.glb Publish 0.1.0 · Ray 5d ago
74ahc04bq-etched.step 74ahc04bq: factory component page (tier=mfr) · Ray 5d ago
74ahc04bq-hero.glb 74ahc04bq: hero GLB from the etched model (keeps the MPN mark) · Ray 5d ago
74ahc04bq-hero.overlay.json Publish 0.1.0 · Ray 5d ago
74ahc04bq.glb Publish 0.1.0 · Ray 5d ago
74ahc04bq.kicad_mod Publish 0.1.0 · Ray 5d ago
74ahc04bq.kicad_sym Publish 0.1.0 · Ray 5d ago
74ahc04bq.lbr Publish 0.1.0 · Ray 5d ago
74ahc04bq.step Publish 0.1.0 · Ray 5d ago
package.json Publish 0.1.0 · Ray 5d ago
page.json Set visibility: public · Ray 5d ago
README.md Publish 0.1.0 · Ray 5d ago

74AHC04BQ

Nexperia · Inverters · DHVQFN-14-EP(2.5x3)

74AHC04BQ from Nexperia, in a DHVQFN-14-EP(2.5x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Data input of inverter 1; inputs accept voltages higher than VCC, with 0 to 5.5 V as the recommended input voltage range.
2 1Y output Data output of inverter 1, the logic inverse of 1A (L input gives H output and H gives L).
3 2A input Data input of inverter 2; inputs accept voltages higher than VCC, with 0 to 5.5 V as the recommended input voltage range.
4 2Y output Data output of inverter 2, the logic inverse of 2A.
5 3A input Data input of inverter 3; inputs accept voltages higher than VCC, with 0 to 5.5 V as the recommended input voltage range.
6 3Y output Data output of inverter 3, the logic inverse of 3A.
7 GND power_in Ground (0 V) reference for all voltages of the device.
8 4Y output Data output of inverter 4, the logic inverse of 4A.
9 4A input Data input of inverter 4; inputs accept voltages higher than VCC, with 0 to 5.5 V as the recommended input voltage range.
10 5Y output Data output of inverter 5, the logic inverse of 5A.
11 5A input Data input of inverter 5; inputs accept voltages higher than VCC, with 0 to 5.5 V as the recommended input voltage range.
12 6Y output Data output of inverter 6, the logic inverse of 6A.
13 6A input Data input of inverter 6; inputs accept voltages higher than VCC, with 0 to 5.5 V as the recommended input voltage range.
14 VCC power_in Supply voltage: 2.0 V to 5.5 V for 74AHC04BQ and 4.5 V to 5.5 V for 74AHCT04BQ per recommended operating conditions.
15 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Nexperia
Package DHVQFN-14-EP(2.5x3)
Category Logic
Pins 15

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
supply voltage VCC -0.5 7 V 4
input voltage VI -0.5 7 V 4
input clamping current IIK -20 mA VI < -0.5 V 4
output clamping current IOK -20 20 mA VO < -0.5 V or VO > VCC + 0.5 V 4
output current IO -25 25 mA VO = -0.5 V to (VCC + 0.5 V) 4
supply current ICC 75 mA 4
ground current IGND -75 mA 4
storage temperature Tstg -65 150 °C 4
total power dissipation Ptot 500 mW Tamb = -40 °C to +125 °C 4
supply voltage (74AHC04) VCC 2 5 5.5 V 4
input voltage VI 0 5.5 V 4
output voltage VO 0 V 4
ambient temperature Tamb -40 25 125 °C 4
input transition rise and fall rate Δt/ΔV 100 ns/V VCC = 3.3 V ± 0.3 V 4
input transition rise and fall rate Δt/ΔV 20 ns/V VCC = 5.0 V ± 0.5 V 4
HIGH-level input voltage VIH 1.5 V VCC = 2.0 V; min over -40 °C to +125 °C 5
HIGH-level input voltage VIH 2.1 V VCC = 3.0 V; min over -40 °C to +125 °C 5
HIGH-level input voltage VIH 3.85 V VCC = 5.5 V; min over -40 °C to +125 °C 5
LOW-level input voltage VIL 0.5 V VCC = 2.0 V; max over -40 °C to +125 °C 5
LOW-level input voltage VIL 0.9 V VCC = 3.0 V; max over -40 °C to +125 °C 5
LOW-level input voltage VIL 1.65 V VCC = 5.5 V; max over -40 °C to +125 °C 5
HIGH-level output voltage VOH 1.9 2 V VI = VIH or VIL; IO = -50 μA; VCC = 2.0 V; min over -40 °C to +125 °C (typ at 25 °C) 5
HIGH-level output voltage VOH 2.9 3 V VI = VIH or VIL; IO = -50 μA; VCC = 3.0 V; min over -40 °C to +125 °C (typ at 25 °C) 5
HIGH-level output voltage VOH 4.4 4.5 V VI = VIH or VIL; IO = -50 μA; VCC = 4.5 V; min over -40 °C to +125 °C (typ at 25 °C) 5
HIGH-level output voltage VOH 2.4 V VI = VIH or VIL; IO = -4.0 mA; VCC = 3.0 V; -40 °C to +125 °C 5
HIGH-level output voltage VOH 3.7 V VI = VIH or VIL; IO = -8.0 mA; VCC = 4.5 V; -40 °C to +125 °C 5
LOW-level output voltage VOL 0 0.1 V VI = VIH or VIL; IO = 50 μA; VCC = 2.0 V; max over -40 °C to +125 °C (typ at 25 °C) 5
LOW-level output voltage VOL 0.55 V VI = VIH or VIL; IO = 4.0 mA; VCC = 3.0 V; -40 °C to +125 °C 5
input leakage current II 2 μA VI = 5.5 V or GND; VCC = 0 V to 5.5 V; -40 °C to +125 °C 5
supply current ICC 40 μA VI = VCC or GND; IO = 0 A; VCC = 5.5 V; -40 °C to +125 °C 5
input capacitance CI 3 10 pF VI = VCC or GND; max over -40 °C to +125 °C (typ at 25 °C) 5
propagation delay tpd 1 4 11 ns nA to nY; see Fig. 4; VCC = 3.0 V to 3.6 V; CL = 15 pF; min/max over -40 °C to +125 °C 7
propagation delay tpd 1 6 14.5 ns nA to nY; see Fig. 4; VCC = 3.0 V to 3.6 V; CL = 50 pF; min/max over -40 °C to +125 °C 7
propagation delay tpd 1 3 7 ns nA to nY; see Fig. 4; VCC = 4.5 V to 5.5 V; CL = 15 pF; min/max over -40 °C to +125 °C 7
propagation delay tpd 1 4.5 9.5 ns nA to nY; see Fig. 4; VCC = 4.5 V to 5.5 V; CL = 50 pF; min/max over -40 °C to +125 °C 7

CAD (KiCad official)

  • Symbol: 74AHC04BQ
  • Footprint: Package_DFN_QFN:DHVQFN-14-1EP_2.5x3mm_P0.5mm_EP1x1.5mm
  • 3D model: DHVQFN-14-EP(2.5x3), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.9 mm nominal VQFN height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: 74ahc04bq-etched.step / 74ahc04bq-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74ahc04bq.step / 74ahc04bq.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (14 pp, sha256 5760e238f9928e10, retrieved 2026-10-18, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF