74AHC02D

{
  "slug": "74ahc02d",
  "version": "0.1.0",
  "type": "component",
  "description": "Nexperia Logic Gates, SO-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "logic",
    "74ahc02d",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "74ahc02d.kicad_sym",
    "74ahc02d.kicad_mod",
    "74ahc02d.glb",
    "74ahc02d.step",
    "74ahc02d.lbr",
    "docs/hero.png",
    "docs/74ahc02d-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "74ahc02d-hero.glb",
    "74ahc02d-hero.overlay.json",
    "74ahc02d-etched.glb"
  ],
  "component": {
    "mpn": "74AHC02D",
    "manufacturer": "Nexperia",
    "package": "SO-14",
    "pin_count": 14,
    "category": "Logic",
    "subcategory": "Logic Gates",
    "datasheet": "https://assets.nexperia.com/documents/data-sheet/74AHC02D.pdf",
    "parts": {
      "symbol": "74ahc02d.kicad_sym",
      "footprint": "74ahc02d.kicad_mod",
      "model_3d": "74ahc02d-hero.glb",
      "model_3d_plain": "74ahc02d-etched.glb",
      "model_3d_step": "74ahc02d-etched.step",
      "model_3d_step_plain": "74ahc02d.step",
      "lbr": "74ahc02d.lbr"
    },
    "distributor_links": {
      "lcsc": "C554195",
      "mouser": "771-74AHC02D"
    },
    "distributor_check": {
      "checked_at": "2026-10-29T16:48:12Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": null,
        "status": "no match"
      },
      "mouser": {
        "pn": "771-74AHC02D",
        "status": "found",
        "lifecycle": "End of Life"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "1Y",
        "type": "output",
        "description": "Data output 1Y of the first NOR gate, which goes HIGH only when both inputs 1A and 1B are LOW (Table 3)."
      },
      {
        "number": "2",
        "name": "1A",
        "type": "input",
        "description": "Data input 1A of the first NOR gate; the datasheet specifies CMOS input levels for 74AHC02 and TTL input levels for 74AHCT02."
      },
      {
        "number": "3",
        "name": "1B",
        "type": "input",
        "description": "Data input 1B of the first NOR gate; inputs have Schmitt-trigger action and accept voltages higher than VCC (Section 2)."
      },
      {
        "number": "4",
        "name": "2Y",
        "type": "output",
        "description": "Data output 2Y of the second NOR gate, which goes HIGH only when both inputs 2A and 2B are LOW (Table 3)."
      },
      {
        "number": "5",
        "name": "2A",
        "type": "input",
        "description": "Data input 2A of the second NOR gate; the datasheet specifies CMOS input levels for 74AHC02 and TTL input levels for 74AHCT02."
      },
      {
        "number": "6",
        "name": "2B",
        "type": "input",
        "description": "Data input 2B of the second NOR gate; inputs have Schmitt-trigger action and accept voltages higher than VCC (Section 2)."
      },
      {
        "number": "7",
        "name": "GND",
        "type": "power_in",
        "description": "Ground pin at 0 V, to which all voltages in the datasheet are referenced."
      },
      {
        "number": "8",
        "name": "3A",
        "type": "input",
        "description": "Data input 3A of the third NOR gate; the datasheet specifies CMOS input levels for 74AHC02 and TTL input levels for 74AHCT02."
      },
      {
        "number": "9",
        "name": "3B",
        "type": "input",
        "description": "Data input 3B of the third NOR gate; inputs have Schmitt-trigger action and accept voltages higher than VCC (Section 2)."
      },
      {
        "number": "10",
        "name": "3Y",
        "type": "output",
        "description": "Data output 3Y of the third NOR gate, which goes HIGH only when both inputs 3A and 3B are LOW (Table 3)."
      },
      {
        "number": "11",
        "name": "4A",
        "type": "input",
        "description": "Data input 4A of the fourth NOR gate; the datasheet specifies CMOS input levels for 74AHC02 and TTL input levels for 74AHCT02."
      },
      {
        "number": "12",
        "name": "4B",
        "type": "input",
        "description": "Data input 4B of the fourth NOR gate; inputs have Schmitt-trigger action and accept voltages higher than VCC (Section 2)."
      },
      {
        "number": "13",
        "name": "4Y",
        "type": "output",
        "description": "Data output 4Y of the fourth NOR gate, which goes HIGH only when both inputs 4A and 4B are LOW (Table 3)."
      },
      {
        "number": "14",
        "name": "VCC",
        "type": "power_in",
        "description": "Supply voltage; recommended range is 2.0 V to 5.5 V for 74AHC02 and 4.5 V to 5.5 V for 74AHCT02 (Table 5)."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The SO14 pin diagram text is garbled in the extraction, so the pin mapping was taken from the Table "
        ],
        "pages_sent": 12,
        "cost_usd": 0.0344,
        "at": "2026-10-29T16:47:58"
      },
      "datasheet": {
        "url": "https://assets.nexperia.com/documents/data-sheet/74AHC02D.pdf",
        "pages": 12,
        "sha256": "c0f66f44ba5d162c",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 14,
        "described": 14,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
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    "models_3d": [
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        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          6.0,
          8.65,
          1.55
        ],
        "zmin_mm": -0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "d7cc2dba1160a8089d80d16b63eb6d6a5c73c70f2d20328e6dd8f3b7be689409",
        "checked": "2026-10-29",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "74ahc02d-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
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        "seat": "z = 0",
        "extents_mm": [
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        "zmin_mm": -0.0,
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        "footprint_binding": "identity",
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        "checked": "2026-10-29",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ],
    "package_dims": {
      "package_code": "SOT108-1",
      "source_page": 7,
      "D": {
        "nom_mm": 8.65,
        "range_mm": [
          8.55,
          8.75
        ]
      },
      "E1": {
        "nom_mm": 3.9,
        "range_mm": [
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          4.0
        ]
      },
      "E": {
        "nom_mm": 6.0,
        "range_mm": [
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          6.2
        ]
      },
      "e": {
        "nom_mm": 1.27,
        "range_mm": [
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        ]
      },
      "A": {
        "nom_mm": 1.75,
        "range_mm": [
          null,
          1.75
        ]
      },
      "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
      "model_check": {
        "file": "74ahc02d.step",
        "verdict": "PASS",
        "reasons": [
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        ],
        "by": "factory/package_fit.py"
      }
    }
  }
}