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74ACT32SCX

onsemi · Gates · SOIC-14

74ACT32SCX from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Input A of gate 0; ACT32 has TTL-compatible inputs (VIH min 2.0V, VIL max 0.8V).
2 B0 input Input B of gate 0; ACT32 has TTL-compatible inputs (VIH min 2.0V, VIL max 0.8V).
3 O0 output Output of gate 0, sources/sinks 24 mA.
4 A1 input Input A of gate 1; ACT32 has TTL-compatible inputs (VIH min 2.0V, VIL max 0.8V).
5 B1 input Input B of gate 1; ACT32 has TTL-compatible inputs (VIH min 2.0V, VIL max 0.8V).
6 O1 output Output of gate 1, sources/sinks 24 mA.
7 GND power_in Ground pin.
8 O3 output Output of gate 3, sources/sinks 24 mA.
9 B3 input Input B of gate 3; ACT32 has TTL-compatible inputs (VIH min 2.0V, VIL max 0.8V).
10 A3 input Input A of gate 3; ACT32 has TTL-compatible inputs (VIH min 2.0V, VIL max 0.8V).
11 O2 output Output of gate 2, sources/sinks 24 mA.
12 B2 input Input B of gate 2; ACT32 has TTL-compatible inputs (VIH min 2.0V, VIL max 0.8V).
13 A2 input Input A of gate 2; ACT32 has TTL-compatible inputs (VIH min 2.0V, VIL max 0.8V).
14 VCC power_in Supply voltage, 4.5V to 5.5V recommended for ACT (absolute maximum 7.0V).

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-14
Category Logic ICs
Pins 14

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VCC 4.5 5.5 V ACT 2
Input Voltage VI 0 V 0V to VCC 2
Output Voltage VO 0 V 0V to VCC 2
Operating Temperature TA -40 85 °C 2
Minimum Input Edge Rate ΔV/Δt 125 mV/ns ACT, VIN from 0.8V to 2.0V, VCC @ 4.5V, 5.5V 2
Supply Voltage (abs max) VCC -0.5 7 V 2
DC Input Diode Current IIK -20 20 mA VI = -0.5V: -20 mA; VI = VCC+0.5V: +20 mA 2
DC Input Voltage VI -0.5 V -0.5V to VCC+0.5V 2
DC Output Diode Current IOK -20 20 mA VO = -0.5V: -20 mA; VO = VCC+0.5V: +20 mA 2
DC Output Voltage VO -0.5 V -0.5V to VCC+0.5V 2
DC Output Source or Sink Current IO -50 50 mA 2
DC VCC or Ground Current per Output Pin ICC or IGND -50 50 mA 2
Storage Temperature TSTG -65 150 °C 2
Junction Temperature TJ 140 °C PDIP 2
Minimum HIGH Level Input Voltage VIH 2 1.5 V VCC=4.5V, TA=-40 to 85°C, VOUT=0.1V or VCC-0.1V 3
Maximum LOW Level Input Voltage VIL 1.5 0.8 V VCC=4.5V, TA=-40 to 85°C, VOUT=0.1V or VCC-0.1V 3
Minimum HIGH Level Output Voltage VOH 4.4 4.49 V VCC=4.5V, IOUT=-50 µA, TA=-40 to 85°C 3
Minimum HIGH Level Output Voltage VOH 5.4 5.49 V VCC=5.5V, IOUT=-50 µA, TA=-40 to 85°C 3
Minimum HIGH Level Output Voltage VOH 3.76 V VCC=4.5V, IOH=-24 mA, TA=-40 to 85°C 3
Minimum HIGH Level Output Voltage VOH 4.76 V VCC=5.5V, IOH=-24 mA (Note 6), TA=-40 to 85°C 3
Maximum LOW Level Output Voltage VOL 0.001 0.1 V VCC=4.5V, IOUT=50 µA, TA=-40 to 85°C 3
Maximum LOW Level Output Voltage VOL 0.44 V VCC=4.5V, IOL=24 mA, TA=-40 to 85°C 3
Maximum Input Leakage Current IIN -1 1 µA VCC=5.5V, VI=VCC, GND, TA=-40 to 85°C 3
Maximum ICC/Input ICCT 0.6 1.5 mA VCC=5.5V, VI=VCC-2.1V, TA=-40 to 85°C 3
Minimum Dynamic Output Current IOLD 75 mA VCC=5.5V, VOLD=1.65V Max (Note 7), TA=-40 to 85°C 3
Maximum Quiescent Supply Current ICC 4 40 µA VCC=5.5V, VIN=VCC or GND, TA=-40 to 85°C 3
Propagation Delay tPLH 1 6.5 10 ns VCC=5.0V, CL=50 pF, TA=-40 to 85°C (TA=25°C: min 1.0, typ 6.5, max 9.0) 3
Input Capacitance CIN 4.5 pF VCC = OPEN 3
Power Dissipation Capacitance CPD 20 pF VCC = 5.0V 3

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC 74AC32PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide 1

CAD (KiCad official)

  • Symbol: 74ACT32SCX
  • Footprint: Package_SO:SOIC-14_3.9x8.7mm_P1.27mm
  • 3D model: SOIC-14 (KiCad packages3D, STEP)
  • 3D model files: 74act32scx-etched.step / 74act32scx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74act32scx.step / 74act32scx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (7 pp, sha256 681abbfe59318ceb, retrieved 2026-10-23, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF