component
74ACT08MTCX
Public Made by Adomby adom
onsemi Logic Gates, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdown74ACT08MTCX
onsemi · Logic Gates · TSSOP-14
74ACT08MTCX from onsemi, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | A0 | input | Gate 0 input A; input voltage range 0V to VCC per recommended operating conditions. |
| 2 | B0 | input | Gate 0 input B; input voltage range 0V to VCC per recommended operating conditions. |
| 3 | O0 | output | Gate 0 output (A0 AND B0); sources/sinks 24mA. |
| 4 | A1 | input | Gate 1 input A; input voltage range 0V to VCC per recommended operating conditions. |
| 5 | B1 | input | Gate 1 input B; input voltage range 0V to VCC per recommended operating conditions. |
| 6 | O1 | output | Gate 1 output (A1 AND B1); sources/sinks 24mA. |
| 7 | GND | power_in | Ground pin. |
| 8 | O3 | output | Gate 3 output (A3 AND B3); sources/sinks 24mA. |
| 9 | B3 | input | Gate 3 input B; input voltage range 0V to VCC per recommended operating conditions. |
| 10 | A3 | input | Gate 3 input A; input voltage range 0V to VCC per recommended operating conditions. |
| 11 | O2 | output | Gate 2 output (A2 AND B2); sources/sinks 24mA. |
| 12 | B2 | input | Gate 2 input B; input voltage range 0V to VCC per recommended operating conditions. |
| 13 | A2 | input | Gate 2 input A; input voltage range 0V to VCC per recommended operating conditions. |
| 14 | VCC | power_in | Supply voltage; 4.5V to 5.5V for ACT devices (absolute maximum -0.5V to +7.0V). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | onsemi |
| Package | TSSOP-14 |
| Category | Logic |
| Pins | 14 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply Voltage (ACT) | VCC | 4.5 | 5.5 | V | ACT devices | 2 | |
| Operating Temperature | TA | -40 | 85 | °C | 2 | ||
| Minimum Input Edge Rate, ACT Devices | ΔV / Δt | 125 | mV/ns | VIN from 0.8V to 2.0V, VCC @ 4.5V, 5.5V | 2 | ||
| Supply Voltage (absolute maximum) | VCC | -0.5 | 7 | V | 2 | ||
| DC Output Source or Sink Current | IO | -50 | 50 | mA | 2 | ||
| DC VCC or Ground Current per Output Pin | ICC or IGND | -50 | 50 | mA | 2 | ||
| Storage Temperature | TSTG | -65 | 150 | °C | 2 | ||
| Junction Temperature | TJ | 140 | °C | 2 | |||
| Minimum HIGH Level Input Voltage | VIH | 2 | 1.5 | V | VCC=4.5V; VOUT = 0.1V or VCC, 0.1V | 4 | |
| Maximum LOW Level Input Voltage | VIL | 1.5 | 0.8 | V | VCC=4.5V; VOUT = 0.1V or VCC, 0.1V | 4 | |
| Minimum HIGH Level Output Voltage | VOH | 4.4 | 4.49 | V | VCC=4.5V; IOUT = -50µA | 4 | |
| Minimum HIGH Level Output Voltage | VOH | 5.4 | 5.49 | V | VCC=5.5V; IOUT = -50µA | 4 | |
| Minimum HIGH Level Output Voltage | VOH | 3.76 | 3.86 | V | VCC=4.5V; VIN = VIL or VIH, IOH = -24mA | 4 | |
| Minimum HIGH Level Output Voltage | VOH | 4.76 | 4.86 | V | VCC=5.5V; VIN = VIL or VIH, IOH = -24mA(4) | 4 | |
| Maximum LOW Level Output Voltage | VOL | 0.001 | 0.1 | V | VCC=4.5V; IOUT = 50µA | 4 | |
| Maximum LOW Level Output Voltage | VOL | 0.36 | 0.44 | V | VCC=4.5V; VIN = VIL or VIH, IOL = 24mA | 4 | |
| Maximum Input Leakage Current | IIN | -1 | 0.1 | 1 | µA | VI = VCC, GND | 4 |
| Maximum ICC/Input | ICCT | 0.6 | 1.5 | mA | VI = VCC, 2.1V | 4 | |
| Minimum Dynamic Output Current | IOLD | 75 | mA | VOLD = 1.65V Max. | 4 | ||
| Minimum Dynamic Output Current | IOHD | -75 | mA | VOHD = 3.85V Min. | 4 | ||
| Maximum Quiescent Supply Current | ICC | 4 | 40 | µA | VIN = VCC or GND | 4 | |
| Propagation Delay tPLH (over temperature) | tPLH | 1 | 6.5 | 10 | ns | VCC 5.0V ±0.5V (note 7); TA = -40°C to +85°C, CL = 50pF | 5 |
| Propagation Delay tPHL (over temperature) | tPHL | 1 | 6.5 | 10 | ns | VCC 5.0V ±0.5V (note 7); TA = -40°C to +85°C, CL = 50pF | 5 |
| Input Capacitance | CIN | 4.5 | pF | VCC = OPEN | 5 | ||
| Power Dissipation Capacitance | CPD | 20 | pF | VCC = 5.0V | 5 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | 74AC08PC N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide | 1 |
CAD (KiCad official)
- Symbol:
74ACT08MTCX - Footprint:
Package_SO:TSSOP-14_4.4x5mm_P0.65mm - 3D model: TSSOP-14 (KiCad packages3D, STEP)
- 3D model files:
74act08mtcx-etched.step/74act08mtcx-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74act08mtcx.step/74act08mtcx.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: onsemi datasheet (6 pp, sha256
8f778a967796d959, retrieved 2026-10-27, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).