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74ACT08MTC

Public Made by Adom

by adom

onsemi Logic Gates, TSSOP-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.

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Contents

README

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74ACT08MTC

onsemi · Logic Gates · TSSOP-14

74ACT08MTC from onsemi, in a TSSOP-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 A0 input Input A of gate 0 (first 2-input AND gate). TTL-compatible input threshold (VIH min 2.0V, VIL max 0.8V at VCC=4.5-5.5V).
2 B0 input Input B of gate 0 (first 2-input AND gate). TTL-compatible input threshold (VIH min 2.0V, VIL max 0.8V at VCC=4.5-5.5V).
3 O0 output Output of gate 0 = A0 AND B0. Push-pull CMOS output sourcing/sinking 24 mA (VOH ≥ 3.76V @ IOH=-24mA, VOL ≤ 0.44V @ IOL=24mA at VCC=4.5V).
4 A1 input Input A of gate 1 (second 2-input AND gate). TTL-compatible input threshold (VIH min 2.0V, VIL max 0.8V at VCC=4.5-5.5V).
5 B1 input Input B of gate 1 (second 2-input AND gate). TTL-compatible input threshold (VIH min 2.0V, VIL max 0.8V at VCC=4.5-5.5V).
6 O1 output Output of gate 1 = A1 AND B1. Push-pull CMOS output sourcing/sinking 24 mA (VOH ≥ 3.76V @ IOH=-24mA, VOL ≤ 0.44V @ IOL=24mA at VCC=4.5V).
7 GND power_in Ground reference (0V). Common ground return for all four gates.
8 O3 output Output of gate 3 = A3 AND B3. Push-pull CMOS output sourcing/sinking 24 mA (VOH ≥ 3.76V @ IOH=-24mA, VOL ≤ 0.44V @ IOL=24mA at VCC=4.5V).
9 B3 input Input B of gate 3 (fourth 2-input AND gate). TTL-compatible input threshold (VIH min 2.0V, VIL max 0.8V at VCC=4.5-5.5V).
10 A3 input Input A of gate 3 (fourth 2-input AND gate). TTL-compatible input threshold (VIH min 2.0V, VIL max 0.8V at VCC=4.5-5.5V).
11 O2 output Output of gate 2 = A2 AND B2. Push-pull CMOS output sourcing/sinking 24 mA (VOH ≥ 3.76V @ IOH=-24mA, VOL ≤ 0.44V @ IOL=24mA at VCC=4.5V).
12 B2 input Input B of gate 2 (third 2-input AND gate). TTL-compatible input threshold (VIH min 2.0V, VIL max 0.8V at VCC=4.5-5.5V).
13 A2 input Input A of gate 2 (third 2-input AND gate). TTL-compatible input threshold (VIH min 2.0V, VIL max 0.8V at VCC=4.5-5.5V).
14 VCC power_in Positive supply voltage. Recommended operating range 4.5V to 5.5V for 74ACT08 (TTL-compatible thresholds). Absolute maximum -0.5V to +7.0V.

Key specifications

Parameter Value
Manufacturer onsemi
Package TSSOP-14
Category Logic
Pins 14

Ordering variants

Same part, different packaging or reel option.

  • 74ACT08MTC
  • 74ACT08MTCX
  • 74ACT08MTCSC
  • 74ACT08MTCSCX
  • 74ACT08MTCPC

CAD (KiCad official)

  • Symbol: 74ACT08MTC
  • Footprint: Package_SO:TSSOP-14_4.4x5mm_P0.65mm
  • 3D model: TSSOP-14 (KiCad packages3D, STEP)
  • 3D model files: 74act08mtc-etched.step / 74act08mtc-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74act08mtc.step / 74act08mtc.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (7 pp, sha256 d37456fb09b16dc7, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF