component
74AC86SCX
Public Made by Adomby adom
onsemi Logic Gates, SOIC-14. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+60@@ -0,0 +1,60 @@+# 74AC86SCX++**onsemi** · Logic Gates · SOIC-14++74AC86SCX from onsemi, in a SOIC-14. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | A0 | input | Input A of XOR gate 0. CMOS logic input; VIH min 3.15 V at VCC = 4.5 V. |+| 2 | B0 | input | Input B of XOR gate 0. CMOS logic input; VIH min 3.15 V at VCC = 4.5 V. |+| 3 | O0 | output | Output of XOR gate 0 (O0 = A0 XOR B0). Push-pull CMOS output; sources/sinks 24 mA at VCC = 4.5 V. |+| 4 | A1 | input | Input A of XOR gate 1. CMOS logic input; VIH min 3.15 V at VCC = 4.5 V. |+| 5 | B1 | input | Input B of XOR gate 1. CMOS logic input; VIH min 3.15 V at VCC = 4.5 V. |+| 6 | O1 | output | Output of XOR gate 1 (O1 = A1 XOR B1). Push-pull CMOS output; sources/sinks 24 mA at VCC = 4.5 V. |+| 7 | GND | power_in | Ground reference (0 V). Connect to system ground; provides return path for supply and output currents. |+| 8 | O3 | output | Output of XOR gate 3 (O3 = A3 XOR B3). Push-pull CMOS output; sources/sinks 24 mA at VCC = 4.5 V. |+| 9 | B3 | input | Input B of XOR gate 3. CMOS logic input; VIH min 3.15 V at VCC = 4.5 V. |+| 10 | A3 | input | Input A of XOR gate 3. CMOS logic input; VIH min 3.15 V at VCC = 4.5 V. |+| 11 | O2 | output | Output of XOR gate 2 (O2 = A2 XOR B2). Push-pull CMOS output; sources/sinks 24 mA at VCC = 4.5 V. |+| 12 | B2 | input | Input B of XOR gate 2. CMOS logic input; VIH min 3.15 V at VCC = 4.5 V. |+| 13 | A2 | input | Input A of XOR gate 2. CMOS logic input; VIH min 3.15 V at VCC = 4.5 V. |+| 14 | VCC | power_in | Positive supply voltage. Recommended operating range 2.0 V to 6.0 V; absolute maximum 7.0 V. Decouple with a 0.1 µF capacitor to GND close to the pin. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | onsemi |+| Package | SOIC-14 |+| Category | Logic |+| Pins | 14 |++## Ordering variants++Same part, different packaging or reel option.++- `74AC86SCX`+- `74AC86SCXSJ`+- `74AC86SCXSJX`+- `74AC86SCXMTC`+- `74AC86SCXMTCX`+- `74AC86SCXPC`++## CAD (KiCad official)++- Symbol: `74AC86SCX`+- Footprint: `Package_SO:SOIC-14_3.9x8.7mm_P1.27mm`+- 3D model: SOIC-14 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [onsemi datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588929185226641408) (7 pp, sha256 `5ef23fabf44a61f6`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/74ac86scx-datasheet.pdf)
page.jsonadded+34@@ -0,0 +1,34 @@+{+ "slug": "74ac86scx",+ "version": "0.1.0",+ "type": "component",+ "description": "onsemi Logic Gates, SOIC-14. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "74ac86scx"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "74ac86scx.kicad_sym",+ "74ac86scx.kicad_mod",+ "74ac86scx.glb",+ "74ac86scx.step",+ "74ac86scx.lbr",+ "docs/hero.png",+ "docs/74ac86scx-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "visibility": "public",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}