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74AC240SCX

Public Made by Adom

by adom

onsemi Buffers / Drivers, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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74AC240SCX

onsemi · Buffers / Drivers · SOIC-20-300mil

74AC240SCX from onsemi, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 OE1 input Active-low 3-STATE output enable input for outputs O0-O3 (pins 12, 14, 16, 18); outputs are high impedance when OE1 is HIGH.
2 I0 input Data input I0 whose inverted level appears on output O0 when OE1 is LOW.
3 O4 tri_state Inverting 3-STATE output O4 that sources/sinks 24 mA and is high impedance when OE2 is HIGH.
4 I1 input Data input I1 whose inverted level appears on output O1 when OE1 is LOW.
5 O5 tri_state Inverting 3-STATE output O5 that sources/sinks 24 mA and is high impedance when OE2 is HIGH.
6 I2 input Data input I2 whose inverted level appears on output O2 when OE1 is LOW.
7 O6 tri_state Inverting 3-STATE output O6 that sources/sinks 24 mA and is high impedance when OE2 is HIGH.
8 I3 input Data input I3 whose inverted level appears on output O3 when OE1 is LOW.
9 O7 tri_state Inverting 3-STATE output O7 that sources/sinks 24 mA and is high impedance when OE2 is HIGH.
10 GND power_in Ground pin (0 V reference).
11 I7 input Data input I7 whose inverted level appears on output O7 when OE2 is LOW.
12 O3 tri_state Inverting 3-STATE output O3 that sources/sinks 24 mA and is high impedance when OE1 is HIGH.
13 I6 input Data input I6 whose inverted level appears on output O6 when OE2 is LOW.
14 O2 tri_state Inverting 3-STATE output O2 that sources/sinks 24 mA and is high impedance when OE1 is HIGH.
15 I5 input Data input I5 whose inverted level appears on output O5 when OE2 is LOW.
16 O1 tri_state Inverting 3-STATE output O1 that sources/sinks 24 mA and is high impedance when OE1 is HIGH.
17 I4 input Data input I4 whose inverted level appears on output O4 when OE2 is LOW.
18 O0 tri_state Inverting 3-STATE output O0 that sources/sinks 24 mA and is high impedance when OE1 is HIGH.
19 OE2 input Active-low 3-STATE output enable input for outputs O4-O7 (pins 3, 5, 7, 9); outputs are high impedance when OE2 is HIGH.
20 VCC power_in Supply voltage pin; recommended 2.0V to 6.0V for AC (4.5V to 5.5V for ACT), absolute maximum -0.5V to +7.0V.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOIC-20-300mil
Category Logic ICs
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply Voltage VCC 2 6 V AC 2
Input Voltage VI 0 V 0V to VCC 2
Output Voltage VO 0 V 0V to VCC 2
Operating Temperature TA -40 85 °C 2
Minimum Input Edge Rate ΔV/Δt 125 mV/ns AC devices, VIN from 30% to 70% of VCC, VCC @ 3.3V, 4.5V, 5.5V 2
Supply Voltage VCC -0.5 7 V 2
DC Input Diode Current IIK -20 mA VI = -0.5V 2
DC Input Diode Current IIK 20 mA VI = VCC + 0.5V 2
DC Input Voltage VI -0.5 V -0.5V to VCC + 0.5V 2
DC Output Diode Current IOK -20 mA VO = -0.5V 2
DC Output Diode Current IOK 20 mA VO = VCC + 0.5V 2
DC Output Voltage VO -0.5 V -0.5V to VCC + 0.5V 2
DC Output Source or Sink Current IO -50 50 mA ±50 mA 2
DC VCC or Ground Current per Output Pin ICC or IGND -50 50 mA ±50 mA 2
Storage Temperature TSTG -65 150 °C 2
Minimum HIGH Level Input Voltage VIH 2.1 1.5 V VCC = 3.0V, VOUT = 0.1V or VCC - 0.1V, TA = -40°C to +85°C 2
Minimum HIGH Level Input Voltage VIH 3.15 2.25 V VCC = 4.5V, VOUT = 0.1V or VCC - 0.1V, TA = -40°C to +85°C 2
Minimum HIGH Level Input Voltage VIH 3.85 2.75 V VCC = 5.5V, VOUT = 0.1V or VCC - 0.1V, TA = -40°C to +85°C 2
Maximum LOW Level Input Voltage VIL 1.5 0.9 V VCC = 3.0V, VOUT = 0.1V or VCC - 0.1V, TA = -40°C to +85°C 2
Maximum LOW Level Input Voltage VIL 2.25 1.35 V VCC = 4.5V, VOUT = 0.1V or VCC - 0.1V, TA = -40°C to +85°C 2
Maximum LOW Level Input Voltage VIL 2.75 1.65 V VCC = 5.5V, VOUT = 0.1V or VCC - 0.1V, TA = -40°C to +85°C 2
Minimum HIGH Level Output Voltage VOH 2.9 2.99 V VCC = 3.0V, IOUT = -50 µA, TA = -40°C to +85°C 2
Minimum HIGH Level Output Voltage VOH 4.4 4.49 V VCC = 4.5V, IOUT = -50 µA, TA = -40°C to +85°C 2
Minimum HIGH Level Output Voltage VOH 5.4 5.49 V VCC = 5.5V, IOUT = -50 µA, TA = -40°C to +85°C 2
Minimum HIGH Level Output Voltage VOH 2.46 2.56 V VCC = 3.0V, VIN = VIL or VIH, IOH = -12 mA 2
Minimum HIGH Level Output Voltage VOH 3.76 3.86 V VCC = 4.5V, VIN = VIL or VIH, IOH = -24 mA 2
Minimum HIGH Level Output Voltage VOH 4.76 4.86 V VCC = 5.5V, VIN = VIL or VIH, IOH = -24 mA (Note 2) 2
Maximum LOW Level Output Voltage VOL 0.002 0.1 V VCC = 3.0V, IOUT = 50 µA, TA = -40°C to +85°C 2
Maximum LOW Level Output Voltage VOL 0.001 0.1 V VCC = 4.5V, IOUT = 50 µA, TA = -40°C to +85°C 2
Maximum LOW Level Output Voltage VOL 0.36 0.44 V VCC = 3.0V, VIN = VIL or VIH, IOL = 12 mA 2
Maximum Input Leakage Current IIN -1 1 µA VCC = 5.5V, VI = VCC, GND 2
Maximum 3-STATE Leakage Current IOZ -2.5 2.5 µA VCC = 5.5V, VI (OE) = VIL, VIH; VI = VCC, GND; VO = VCC, GND 2
Minimum Dynamic Output Current IOLD 75 mA VCC = 5.5V, VOLD = 1.65V Max (Note 3) 2
Minimum Dynamic Output Current IOHD -75 mA VCC = 5.5V, VOHD = 3.85V Min (Note 3) 2
Maximum Quiescent Supply Current ICC 4 40 µA VCC = 5.5V, VIN = VCC or GND 2
Propagation Delay Data to Output (LH) tPLH 1 6 9 ns VCC = 3.3V, CL = 50 pF, TA = -40°C to +85°C 4
Propagation Delay Data to Output (LH) tPLH 1 4.5 7 ns VCC = 5.0V, CL = 50 pF, TA = -40°C to +85°C 4
Propagation Delay Data to Output (HL) tPHL 1 5.5 8.5 ns VCC = 3.3V, CL = 50 pF, TA = -40°C to +85°C 4
Propagation Delay Data to Output (HL) tPHL 1 4.5 6.5 ns VCC = 5.0V, CL = 50 pF, TA = -40°C to +85°C 4
Output Enable Time tPZH 1 6 11 ns VCC = 3.3V, CL = 50 pF, TA = -40°C to +85°C 4
Output Enable Time tPZH 1 5 8 ns VCC = 5.0V, CL = 50 pF, TA = -40°C to +85°C 4
Output Enable Time tPZL 1 7 11 ns VCC = 3.3V, CL = 50 pF, TA = -40°C to +85°C 4
Output Enable Time tPZL 1 5.5 8.5 ns VCC = 5.0V, CL = 50 pF, TA = -40°C to +85°C 4
Output Disable Time tPHZ 1 7 10.5 ns VCC = 3.3V, CL = 50 pF, TA = -40°C to +85°C 4
Output Disable Time tPHZ 1 6.5 9.5 ns VCC = 5.0V, CL = 50 pF, TA = -40°C to +85°C 4
Output Disable Time tPLZ 1 7.5 11.5 ns VCC = 3.3V, CL = 50 pF, TA = -40°C to +85°C 4
Input Capacitance CIN 4.5 pF VCC = OPEN 4
Power Dissipation Capacitance CPD 45 pF VCC = 5.0V 4

Materials and finish

As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).

Part Material Colour / plating Datasheet says Page
housing PC 74AC240PC N20A 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide 1

CAD (KiCad official)

  • Symbol: 74AC240SCX
  • Footprint: Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm
  • 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
  • 3D model files: 74ac240scx-etched.step / 74ac240scx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74ac240scx.step / 74ac240scx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (8 pp, sha256 2731981b9213ada7, retrieved 2026-10-31, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF