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74AC11086D

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Texas Instruments Logic ICs, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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74AC11086D

Texas Instruments · Logic ICs · SOIC-16

74AC11086D from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1A input Input A of XOR gate 1; input voltage must stay between 0 and VCC per the recommended operating conditions.
2 1Y output Output of XOR gate 1 (Y = A ⊕ B); recommended IOH/IOL is up to ±24 mA at 4.5 V to 5.5 V, with absolute-maximum continuous output current of ±50 mA.
3 2Y output Output of XOR gate 2 (Y = A ⊕ B); recommended IOH/IOL is up to ±24 mA at 4.5 V to 5.5 V, with absolute-maximum continuous output current of ±50 mA.
4 GND power_in Ground reference; one of two center-pin GND connections, provided to minimize high-speed switching noise.
5 GND power_in Ground reference; one of two center-pin GND connections, provided to minimize high-speed switching noise.
6 3Y output Output of XOR gate 3 (Y = A ⊕ B); recommended IOH/IOL is up to ±24 mA at 4.5 V to 5.5 V, with absolute-maximum continuous output current of ±50 mA.
7 4Y output Output of XOR gate 4 (Y = A ⊕ B); recommended IOH/IOL is up to ±24 mA at 4.5 V to 5.5 V, with absolute-maximum continuous output current of ±50 mA.
8 4B input Input B of XOR gate 4; input voltage must stay between 0 and VCC per the recommended operating conditions.
9 4A input Input A of XOR gate 4; input voltage must stay between 0 and VCC per the recommended operating conditions.
10 3B input Input B of XOR gate 3; input voltage must stay between 0 and VCC per the recommended operating conditions.
11 3A input Input A of XOR gate 3; input voltage must stay between 0 and VCC per the recommended operating conditions.
12 VCC power_in Supply voltage, 3 V to 5.5 V (5 V nominal) per the recommended operating conditions; one of two center-pin VCC connections.
13 VCC power_in Supply voltage, 3 V to 5.5 V (5 V nominal) per the recommended operating conditions; one of two center-pin VCC connections.
14 2B input Input B of XOR gate 2; input voltage must stay between 0 and VCC per the recommended operating conditions.
15 2A input Input A of XOR gate 2; input voltage must stay between 0 and VCC per the recommended operating conditions.
16 1B input Input B of XOR gate 1; input voltage must stay between 0 and VCC per the recommended operating conditions.

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package SOIC-16
Category Logic ICs
Pins 16

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Supply voltage VCC 3 5 5.5 V 3
High-level input voltage VIH 2.1 V VCC = 3 V 3
High-level input voltage VIH 3.15 V VCC = 4.5 V 3
High-level input voltage VIH 3.85 V VCC = 5.5 V 3
Low-level input voltage VIL 0.9 V VCC = 3 V 3
Low-level input voltage VIL 1.35 V VCC = 4.5 V 3
Low-level input voltage VIL 1.65 V VCC = 5.5 V 3
Input voltage VI 0 V 3
Output voltage VO 0 V 3
High-level output current IOH -4 mA VCC = 3 V 3
High-level output current IOH -24 mA VCC = 4.5 V 3
Low-level output current IOL 12 mA VCC = 3 V 3
Low-level output current IOL 24 mA VCC = 4.5 V 3
Input transition rise or fall rate Δt/Δv 0 10 ns/V 3
Operating free-air temperature TA -40 85 °C 3
Supply voltage range VCC -0.5 7 V 2
Input voltage range VI -0.5 V VCC + 0.5 V upper limit as printed; see note 1 2
Output voltage range VO -0.5 V VCC + 0.5 V upper limit as printed; see note 1 2
Input clamp current IIK -20 20 mA VI < 0 or VI > VCC 2
Output clamp current IOK -50 50 mA VO < 0 or VO > VCC 2
Continuous output current IO -50 50 mA VO = 0 to VCC 2
Continuous current through VCC or GND -100 100 mA 2
Maximum power dissipation (D package) 1.3 W TA = 55°C, still air, D package 2
Storage temperature range Tstg -65 150 °C 2
High-level output voltage VOH 2.9 V IOH = -50 µA, VCC = 3 V 3
High-level output voltage VOH 4.4 V IOH = -50 µA, VCC = 4.5 V 3
High-level output voltage VOH 5.4 V IOH = -50 µA, VCC = 5.5 V 3
High-level output voltage VOH 2.48 V IOH = -4 mA, VCC = 3 V 3
High-level output voltage VOH 3.8 V IOH = -24 mA, VCC = 4.5 V 3
High-level output voltage VOH 4.8 V IOH = -24 mA, VCC = 5.5 V 3
High-level output voltage VOH 3.85 V IOH = -75 mA, VCC = 5.5 V (not more than one output tested at a time, ≤10 ms) 3
Low-level output voltage VOL 0.1 V IOL = 50 µA, VCC = 3 V 3
Low-level output voltage VOL 0.44 V IOL = 12 mA, VCC = 3 V 3
Low-level output voltage VOL 1.65 V IOL = 75 mA, VCC = 5.5 V (not more than one output tested at a time, ≤10 ms) 3
Input current II -1 1 µA VI = VCC or GND, VCC = 5.5 V 3
Quiescent supply current ICC 40 µA VI = VCC or GND, IO = 0, VCC = 5.5 V 3
Propagation delay low-to-high tPLH 1.5 10.6 ns A or B to Y, VCC = 3.3 V ± 0.3 V, over recommended operating free-air temperature range 4
Propagation delay high-to-low tPHL 1.5 8.2 ns A or B to Y, VCC = 3.3 V ± 0.3 V, over recommended operating free-air temperature range 4
Propagation delay low-to-high tPLH 1.5 7.6 ns A or B to Y, VCC = 5 V ± 0.5 V, over recommended operating free-air temperature range 4
Propagation delay high-to-low tPHL 1.5 6.8 ns A or B to Y, VCC = 5 V ± 0.5 V, over recommended operating free-air temperature range 4
Input capacitance Ci 3.5 pF VI = VCC or GND, VCC = 5 V 3

CAD (KiCad official)

  • Symbol: 74AC11086D
  • Footprint: Package_SO:SOIC-16_3.9x9.9mm_P1.27mm
  • 3D model: SOIC-16 (KiCad packages3D, STEP)
  • 3D model files: 74ac11086d-etched.step / 74ac11086d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74ac11086d.step / 74ac11086d.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (9 pp, sha256 cd38f98898cfd089, retrieved 2026-10-21, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF