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74ABT244PW

Public Made by Adom

by adom

Nexperia Buffers, Drivers, Receivers, Transceivers, TSSOP-20. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

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Contents

README

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74ABT244PW

Nexperia · Buffers, Drivers, Receivers, Transceivers · TSSOP-20

74ABT244PW from Nexperia, in a TSSOP-20. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 1OE input Active-LOW output enable for outputs 1Y0 to 1Y3; a HIGH level forces these outputs into the high-impedance OFF-state.
2 1A0 input Data input of the first 4-bit buffer feeding output 1Y0; input voltage range is 0 V to VCC.
3 2Y0 tri_state 3-state data output of the second 4-bit buffer, controlled by 2OE; recommended IOH is -32 mA and IOL is 64 mA.
4 1A1 input Data input of the first 4-bit buffer feeding output 1Y1; input voltage range is 0 V to VCC.
5 2Y1 tri_state 3-state data output of the second 4-bit buffer, controlled by 2OE; recommended IOH is -32 mA and IOL is 64 mA.
6 1A2 input Data input of the first 4-bit buffer feeding output 1Y2; input voltage range is 0 V to VCC.
7 2Y2 tri_state 3-state data output of the second 4-bit buffer, controlled by 2OE; recommended IOH is -32 mA and IOL is 64 mA.
8 1A3 input Data input of the first 4-bit buffer feeding output 1Y3; input voltage range is 0 V to VCC.
9 2Y3 tri_state 3-state data output of the second 4-bit buffer, controlled by 2OE; recommended IOH is -32 mA and IOL is 64 mA.
10 GND power_in Ground reference (0 V) for all device voltages.
11 2A3 input Data input of the second 4-bit buffer feeding output 2Y3; input voltage range is 0 V to VCC.
12 1Y3 tri_state 3-state data output of the first 4-bit buffer, controlled by 1OE; recommended IOH is -32 mA and IOL is 64 mA.
13 2A2 input Data input of the second 4-bit buffer feeding output 2Y2; input voltage range is 0 V to VCC.
14 1Y2 tri_state 3-state data output of the first 4-bit buffer, controlled by 1OE; recommended IOH is -32 mA and IOL is 64 mA.
15 2A1 input Data input of the second 4-bit buffer feeding output 2Y1; input voltage range is 0 V to VCC.
16 1Y1 tri_state 3-state data output of the first 4-bit buffer, controlled by 1OE; recommended IOH is -32 mA and IOL is 64 mA.
17 2A0 input Data input of the second 4-bit buffer feeding output 2Y0; input voltage range is 0 V to VCC.
18 1Y0 tri_state 3-state data output of the first 4-bit buffer, controlled by 1OE; recommended IOH is -32 mA and IOL is 64 mA.
19 2OE input Active-LOW output enable for outputs 2Y0 to 2Y3; a HIGH level forces these outputs into the high-impedance OFF-state.
20 VCC power_in Supply voltage of 4.5 V to 5.5 V recommended; absolute maximum rating is -0.5 V to +7.0 V.

Key specifications

Parameter Value
Manufacturer Nexperia
Package TSSOP-20
Category Logic
Pins 20

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VCC supply voltage VCC 4.5 5.5 V 4
input voltage VI 0 V 4
HIGH-level output current IOH -32 mA 4
LOW-level output current IOL 64 mA 4
input transition rise and fall rate Δt/ΔV 0 5 ns/V 4
ambient temperature Tamb -40 85 °C in free air 4
supply voltage VCC -0.5 7 V 4
input voltage VI -1.2 7 V 4
output voltage VO -0.5 5.5 V output in OFF-state or HIGH-state 4
input clamping current IIK -18 mA VI < 0 V 4
output clamping current IOK -50 mA VO < 0 V 4
output current IO 128 mA output in LOW-state 4
junction temperature Tj 150 °C 4
storage temperature Tstg -65 150 °C 4
input clamping voltage VIK -1.2 -0.9 V VCC = 4.5 V; IIK = -18 mA; −45 °C to +85 °C 4
HIGH-level input voltage VIH 2 V −45 °C to +85 °C 4
LOW-level input voltage VIL 0.8 V −45 °C to +85 °C 4
HIGH-level output voltage VOH 2.5 2.9 V VCC = 4.5 V; VI = VIL or VIH; IOH = -3 mA; −45 °C to +85 °C 4
HIGH-level output voltage VOH 2 2.4 V VCC = 4.5 V; VI = VIL or VIH; IOH = -32 mA; −45 °C to +85 °C 4
HIGH-level output voltage VOH 3 3.4 V VCC = 5.0 V; VI = VIL or VIH; IOH = -3 mA; −45 °C to +85 °C 4
LOW-level output voltage VOL 0.42 0.55 V VCC = 4.5 V; VI = VIL or VIH; IOL = 64 mA; −45 °C to +85 °C 5
input leakage current II 0.01 1 μA VCC = 5.5 V; VI = GND or 5.5 V; −45 °C to +85 °C 5
power-off leakage current IOFF 5 100 μA VCC = 0 V; VO or VI ≤ 4.5 V; −45 °C to +85 °C 5
power-up/power-down output current IO(pu/pd) 5 50 μA VCC = 2.0 V; VO = 0.5 V; VI = GND or VCC; nOE = don't care; −45 °C to +85 °C 5
OFF-state output current, output HIGH-state IOZ 5 50 μA VCC = 5.5 V; VO = 2.7 V; −45 °C to +85 °C 5
OFF-state output current, output LOW-state IOZ -5 -50 μA VCC = 5.5 V; VO = 0.5 V; −45 °C to +85 °C 5
output high leakage current ICEX 5 50 μA VCC = 5.5 V; VO = 5.5 V; VI = GND or VCC; −45 °C to +85 °C 5
output current IO -40 -100 -180 mA VCC = 5.5 V; VO = 2.5 V; −45 °C to +85 °C 5
supply current, outputs HIGH-state ICC 50 250 μA VCC = 5.5 V; VI = GND or VCC; outputs HIGH-state; −45 °C to +85 °C 5
supply current, outputs LOW-state ICC 24 30 mA VCC = 5.5 V; VI = GND or VCC; outputs LOW-state; −45 °C to +85 °C 5
supply current, outputs disabled ICC 50 250 μA VCC = 5.5 V; VI = GND or VCC; outputs disabled; −45 °C to +85 °C 5
additional supply current, outputs enabled, one data input at 3.4 V ΔICC 0.5 1.5 mA per input pin; VCC = 5.5 V; outputs enabled; one data input at 3.4 V; other inputs at VCC or GND; −45 °C to +85 °C 5
additional supply current, outputs disabled, one data input at 3.4 V ΔICC 50 250 μA per input pin; VCC = 5.5 V; outputs disabled; one data input at 3.4 V; other inputs at VCC or GND; −45 °C to +85 °C 5
additional supply current, outputs disabled, one enable input at 3.4 V ΔICC 0.5 1.5 mA per input pin; VCC = 5.5 V; outputs disabled; one enable input at 3.4 V; other inputs at VCC or GND; −45 °C to +85 °C 5
LOW to HIGH propagation delay tPLH 1 2.6 4.6 ns nAn to nYn; see Fig. 4; −40 °C to 85 °C, VCC = 5.0 V ± 0.5 V 6
HIGH to LOW propagation delay tPHL 1 2.9 4.6 ns nAn to nYn; see Fig. 4; −40 °C to 85 °C, VCC = 5.0 V ± 0.5 V 6
OFF-state to HIGH propagation delay tPZH 1.1 3.1 5.1 ns nOE to nYn; see Fig. 5; −40 °C to 85 °C, VCC = 5.0 V ± 0.5 V 6
OFF-state to LOW propagation delay tPZL 2.1 4.1 6.1 ns nOE to nYn; see Fig. 5; −40 °C to 85 °C, VCC = 5.0 V ± 0.5 V 6
HIGH to OFF-state propagation delay tPHZ 2.1 4.1 6.6 ns nOE to nYn; see Fig. 5; −40 °C to 85 °C, VCC = 5.0 V ± 0.5 V 6
LOW to OFF-state propagation delay tPLZ 1.7 2.7 5.7 ns nOE to nYn; see Fig. 5; −40 °C to 85 °C, VCC = 5.0 V ± 0.5 V 6

CAD (KiCad official)

  • Symbol: 74ABT244PW
  • Footprint: Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm
  • 3D model: TSSOP-20 (KiCad packages3D, STEP)
  • 3D model files: 74abt244pw-etched.step / 74abt244pw-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 74abt244pw.step / 74abt244pw.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Nexperia datasheet (13 pp, sha256 9c9766611b8ebd51, retrieved 2026-10-18, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF