component
74ABT244D
Public Made by Adomby adom
Nexperia Buffers / Drivers, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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README
markdown74ABT244D
Nexperia · Buffers / Drivers · SOIC-20-300mil
74ABT244D from Nexperia, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | 1OE | input | Active-LOW output enable input for the 1Yn outputs; a HIGH puts them in the high-impedance OFF-state. |
| 2 | 1A0 | input | Data input 0 of buffer group 1. |
| 3 | 2Y0 | tri_state | 3-state data output 0 of buffer group 2, controlled by 2OE (output capability +64 mA/-32 mA). |
| 4 | 1A1 | input | Data input 1 of buffer group 1. |
| 5 | 2Y1 | tri_state | 3-state data output 1 of buffer group 2, controlled by 2OE (output capability +64 mA/-32 mA). |
| 6 | 1A2 | input | Data input 2 of buffer group 1. |
| 7 | 2Y2 | tri_state | 3-state data output 2 of buffer group 2, controlled by 2OE (output capability +64 mA/-32 mA). |
| 8 | 1A3 | input | Data input 3 of buffer group 1. |
| 9 | 2Y3 | tri_state | 3-state data output 3 of buffer group 2, controlled by 2OE (output capability +64 mA/-32 mA). |
| 10 | GND | power_in | Ground (0 V). |
| 11 | 2A3 | input | Data input 3 of buffer group 2. |
| 12 | 1Y3 | tri_state | 3-state data output 3 of buffer group 1, controlled by 1OE (output capability +64 mA/-32 mA). |
| 13 | 2A2 | input | Data input 2 of buffer group 2. |
| 14 | 1Y2 | tri_state | 3-state data output 2 of buffer group 1, controlled by 1OE (output capability +64 mA/-32 mA). |
| 15 | 2A1 | input | Data input 1 of buffer group 2. |
| 16 | 1Y1 | tri_state | 3-state data output 1 of buffer group 1, controlled by 1OE (output capability +64 mA/-32 mA). |
| 17 | 2A0 | input | Data input 0 of buffer group 2. |
| 18 | 1Y0 | tri_state | 3-state data output 0 of buffer group 1, controlled by 1OE (output capability +64 mA/-32 mA). |
| 19 | 2OE | input | Active-LOW output enable input for the 2Yn outputs; a HIGH puts them in the high-impedance OFF-state. |
| 20 | VCC | power_in | Supply voltage, 4.5 V to 5.5 V recommended operating range. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Nexperia |
| Package | SOIC-20-300mil |
| Category | Logic ICs |
| Pins | 20 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Supply voltage | VCC | -0.5 | 7 | V | 4 | ||
| Input voltage | VI | -1.2 | 7 | V | 4 | ||
| Output voltage | VO | -0.5 | 5.5 | V | output in OFF-state or HIGH-state | 4 | |
| Input clamping current | IIK | -18 | mA | VI < 0 V | 4 | ||
| Output clamping current | IOK | -50 | mA | VO < 0 V | 4 | ||
| Output current | IO | 128 | mA | output in LOW-state | 4 | ||
| Junction temperature | Tj | 150 | °C | 4 | |||
| Storage temperature | Tstg | -65 | 150 | °C | 4 | ||
| Supply voltage | VCC | 4.5 | 5.5 | V | 4 | ||
| Input voltage | VI | 0 | V | max is VCC | 4 | ||
| HIGH-level output current | IOH | -32 | mA | 4 | |||
| LOW-level output current | IOL | 64 | mA | 4 | |||
| Input transition rise and fall rate | Δt/ΔV | 0 | 5 | ns/V | 4 | ||
| Ambient temperature | Tamb | -40 | 85 | °C | in free air | 4 | |
| Input clamping voltage | VIK | -1.2 | -0.9 | V | VCC = 4.5 V; IIK = -18 mA; 25 °C | 4 | |
| HIGH-level input voltage | VIH | 2 | V | 4 | |||
| LOW-level input voltage | VIL | 0.8 | V | 4 | |||
| HIGH-level output voltage | VOH | 2.5 | 2.9 | V | VCC = 4.5 V; VI = VIL or VIH; IOH = -3 mA; 25 °C | 4 | |
| HIGH-level output voltage | VOH | 2 | 2.4 | V | VCC = 4.5 V; VI = VIL or VIH; IOH = -32 mA; 25 °C | 4 | |
| HIGH-level output voltage | VOH | 3 | 3.4 | V | VCC = 5.0 V; VI = VIL or VIH; IOH = -3 mA; 25 °C | 4 | |
| LOW-level output voltage | VOL | 0.42 | 0.55 | V | VCC = 4.5 V; VI = VIL or VIH; IOL = 64 mA; 25 °C | 5 | |
| Input leakage current | II | -1 | 1 | μA | VCC = 5.5 V; VI = GND or 5.5 V; ±1.0 max | 5 | |
| Power-off leakage current | IOFF | -100 | 100 | μA | VCC = 0 V; VO or VI ≤ 4.5 V; ±100 max | 5 | |
| Power-up/power-down output current | IO(pu/pd) | -50 | 50 | μA | VCC = 2.0 V; VO = 0.5 V; VI = GND or VCC; nOE = don't care; ±50 max | 5 | |
| OFF-state output current (HIGH-state) | IOZ | 5 | 50 | μA | VCC = 5.5 V; VI = VIL or VIH; output HIGH-state at VO = 2.7 V | 5 | |
| OFF-state output current (LOW-state) | IOZ | -50 | -5 | μA | VCC = 5.5 V; VI = VIL or VIH; output LOW-state at VO = 0.5 V | 5 | |
| Output high leakage current | ICEX | 5 | 50 | μA | VCC = 5.5 V; VO = 5.5 V; VI = GND or VCC | 5 | |
| Output current | IO | -180 | -100 | -40 | mA | VCC = 5.5 V; VO = 2.5 V; 25 °C | 5 |
| Supply current (outputs HIGH-state) | ICC | 50 | 250 | μA | VCC = 5.5 V; VI = GND or VCC; outputs HIGH-state | 5 | |
| Supply current (outputs LOW-state) | ICC | 24 | 30 | mA | VCC = 5.5 V; VI = GND or VCC; outputs LOW-state | 5 | |
| Supply current (outputs disabled) | ICC | 50 | 250 | μA | VCC = 5.5 V; VI = GND or VCC; outputs disabled | 5 | |
| Additional supply current (outputs enabled, data input at 3.4 V) | ΔICC | 0.5 | 1.5 | mA | per input pin; VCC = 5.5 V; outputs enabled; one data input at 3.4 V, other inputs at VCC or GND | 5 | |
| Additional supply current (outputs disabled, data input at 3.4 V) | ΔICC | 50 | 250 | μA | per input pin; VCC = 5.5 V; outputs disabled; one data input at 3.4 V, other inputs at VCC or GND | 5 | |
| Additional supply current (outputs disabled, enable input at 3.4 V) | ΔICC | 0.5 | 1.5 | mA | per input pin; VCC = 5.5 V; outputs disabled; one enable input at 3.4 V, other inputs at VCC or GND | 5 | |
| Input capacitance | CI | 4 | pF | VI = 0 V or VCC | 5 | ||
| Output capacitance | CO | 7 | pF | outputs disabled; VO = 0 V or VCC | 5 | ||
| LOW to HIGH propagation delay | tPLH | 1 | 2.6 | 4.6 | ns | nAn to nYn; see Fig. 4; typ at 25 °C, VCC = 5.0 V; min/max -40 °C to 85 °C, VCC = 5.0 V ± 0.5 V | 6 |
| HIGH to LOW propagation delay | tPHL | 1 | 2.9 | 4.6 | ns | nAn to nYn; see Fig. 4; typ at 25 °C, VCC = 5.0 V; min/max -40 °C to 85 °C, VCC = 5.0 V ± 0.5 V | 6 |
| OFF-state to HIGH propagation delay | tPZH | 1.1 | 3.1 | 5.1 | ns | nOE to nYn; see Fig. 5; typ at 25 °C, VCC = 5.0 V; min/max -40 °C to 85 °C, VCC = 5.0 V ± 0.5 V | 6 |
| OFF-state to LOW propagation delay | tPZL | 2.1 | 4.1 | 6.1 | ns | nOE to nYn; see Fig. 5; typ at 25 °C, VCC = 5.0 V; min/max -40 °C to 85 °C, VCC = 5.0 V ± 0.5 V | 6 |
| HIGH to OFF-state propagation delay | tPHZ | 2.1 | 4.1 | 6.6 | ns | nOE to nYn; see Fig. 5; typ at 25 °C, VCC = 5.0 V; min/max -40 °C to 85 °C, VCC = 5.0 V ± 0.5 V | 6 |
| LOW to OFF-state propagation delay | tPLZ | 1.7 | 2.7 | 5.7 | ns | nOE to nYn; see Fig. 5; typ at 25 °C, VCC = 5.0 V; min/max -40 °C to 85 °C, VCC = 5.0 V ± 0.5 V | 6 |
CAD (KiCad official)
- Symbol:
74ABT244D - Footprint:
Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm - 3D model: SOIC-20-300mil (KiCad packages3D, STEP)
- 3D model files:
74abt244d-etched.step/74abt244d-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);74abt244d.step/74abt244d.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Nexperia datasheet (13 pp, sha256
9c9766611b8ebd51, retrieved 2026-10-22, tier: manufacturer) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).