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6PAIC3254IRHBRQ1

Texas Instruments · Audio Interface ICs · VQFN-32(5x5)

6PAIC3254IRHBRQ1 from Texas Instruments, in a VQFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 MCLK input Master clock input.
2 BCLK bidirectional Audio serial data bus (primary) bit clock.
3 WCLK bidirectional Audio serial data bus (primary) word clock.
4 DIN/MFP1 input Audio serial data bus data input (primary); secondary functions are digital microphone input, general purpose clock input and general purpose input.
5 DOUT/MFP2 output Audio serial data bus data output (primary); secondary functions include general purpose output, clock output, INT1/INT2 output and secondary I2S bit/word clock outputs.
6 IOVDD power_in IO voltage supply, 1.1V to 3.6V.
7 IOVSS power_in IO ground supply.
8 SCLK/MFP3 input SPI serial clock when SPI_Select = 1; with SPI_Select = 0 secondary functions include headphone-detect input, digital microphone input, secondary I2S inputs and general purpose input.
9 SCL/SS input I2C serial clock (SPI_Select = 0) or SPI chip-select (SPI_Select = 1).
10 SDA/MOSI input I2C serial data input (SPI_Select = 0) or SPI serial data input (SPI_Select = 1).
11 MISO/MFP4 output SPI serial data output when SPI_Select = 1; with SPI_Select = 0 secondary functions include general purpose output, CLKOUT, INT1/INT2, ADC word clock output, digital microphone clock output and secondary I2S outputs.
12 SPI_SELECT input Control mode select pin (1 = SPI, 0 = I2C).
13 IN1_L input Multifunction analog input; single-ended MIC 1 or Line 1 left, or differential MIC/Line negative input.
14 IN1_R input Multifunction analog input; single-ended MIC 1 or Line 1 right, or differential MIC/Line positive input.
15 IN2_L input Multifunction analog input; single-ended MIC 2 or Line 2, or differential MIC/Line left positive input.
16 IN2_R input Multifunction analog input; single-ended MIC 2 or Line 2 right, or differential MIC/Line left negative input.
17 AVSS power_in Analog ground supply.
18 REF output Reference voltage output for filtering.
19 MICBIAS output Microphone bias voltage output.
20 IN3_L input Multifunction analog input; single-ended MIC3 or Line 3 left, or differential MIC/Line left positive or right negative input.
21 IN3_R input Multifunction analog input; single-ended MIC3 or Line 3 right, or differential MIC/Line left negative or right positive input.
22 LOL output Left line output, drives line loads of 600 ohm to 10 kohm.
23 LOR output Right line output, drives line loads of 600 ohm to 10 kohm.
24 AVDD power_in Analog voltage supply 1.5V to 1.95V; input when A-LDO is disabled, filtering output when A-LDO is enabled.
25 HPL output Left high power output driver.
26 LDOIN/HPVDD power_in LDO input supply and headphone power supply, 1.9V to 3.6V.
27 HPR output Right high power output driver.
28 DVSS power_in Digital ground and chip substrate.
29 DVDD power_in Digital voltage supply 1.26V to 1.95V when LDO_SELECT = 0 (D-LDO disabled); filtering output when LDO_SELECT = 1 (D-LDO enabled).
30 LDO_SELECT input Digital LDO select: 0 disables the D-LDO, 1 enables it (table text also says 'connect to DVss').
31 RESET input Reset, active low.
32 GPIO/MFP5 bidirectional General purpose digital IO (primary); secondary functions include CLKOUT, INT1/INT2 output, ADC word clock, secondary I2S clocks and digital microphone clock output.
33 EP passive Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter Value
Manufacturer Texas Instruments
Package VQFN-32(5x5)
Category Communication Interface Chip/UART/485/232
Pins 33

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
AVDD to AVSS AVDD -0.3 2.2 V 7
DVDD to DVSS DVDD -0.3 2.2 V 7
IOVDD to IOVSS IOVDD -0.3 3.9 V 7
LDOIN to AVSS LDOIN -0.3 3.9 V 7
Operating temperature range -40 85 °C 7
Storage temperature range -55 125 °C 7
Junction temperature TJ Max 105 °C 7
LDOIN supply voltage LDOIN 1.9 3.6 V Referenced to AVSS 7
AVDD supply voltage AVDD 1.5 1.8 1.95 V Referenced to AVSS 7
IOVDD supply voltage IOVDD 1.1 3.6 V Referenced to IOVSS 7
DVDD supply voltage DVDD 1.26 1.8 1.95 V Referenced to DVSS 7
Operating Temperature Range TOPR -40 85 °C 7
Junction-to-ambient thermal resistance θJA 31.4 °C/W RHB (32 pins) 8
Junction-to-case (top) thermal resistance θJCtop 21.4 °C/W RHB (32 pins) 8
Junction-to-board thermal resistance θJB 5.4 °C/W RHB (32 pins) 8
LDO output voltage accuracy (AVdd) -2 2 % 15
LDO output voltage accuracy (DVdd) -2 2 % 15
VIL low-level input voltage VIL -0.3 V IIL = 5 μA, IOVDD > 1.6V (max 0.3 × IOVDD) 17
Maximum miniDSP clock frequency - ADC 55.3 MHz DVDD = 1.65V 16

CAD (KiCad official)

  • Symbol: 6PAIC3254IRHBRQ1
  • Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
  • 3D model: VQFN-32(5x5) (KiCad packages3D, STEP)
  • 3D model files: 6paic3254irhbrq1-etched.step / 6paic3254irhbrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 6paic3254irhbrq1.step / 6paic3254irhbrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Texas Instruments datasheet (49 pp, sha256 c108b0a6db5178e4, retrieved 2026-10-27, tier: lcsc)
  • Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF