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Contents

Pinout
Key specifications
CAD (KiCad official)
Provenance

README

markdown

6PAIC3109TRHBRQ1

Texas Instruments · Audio Interface ICs · VQFN-32(5x5)

6PAIC3109TRHBRQ1 from Texas Instruments, in a VQFN-32(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	MCLK	input	Master clock input accepting frequency range from 512 kHz to 50 MHz for audio clock generation.
2	BCLK	bidirectional	Audio serial data bus bit clock, configurable as input in slave mode or output in master mode.
3	WCLK	bidirectional	Audio serial data bus word clock, configurable as input in slave mode or output in master mode.
4	DIN	input	Audio serial data bus data input for audio samples from host processor.
5	DOUT	output	Audio serial data bus data output for audio samples to host processor; can be placed in high-impedance state when valid data are not being sent.
6	DVSS	power_in	Digital core and I/O ground supply.
7	IOVDD	power_in	Digital I/O voltage supply with recommended range 1.1 V to 3.6 V; connect 1-µF and 0.1-µF decoupling capacitors.
8	SCL	bidirectional	I²C serial clock input supporting standard and fast modes for device register access.
9	SDA	bidirectional	I²C serial data input/output supporting standard and fast modes for device register access.
10	MIC1P/LINE1P	input	Microphone or line input configurable as differential (+) or single-ended; connect 0.47-µF capacitor to AVSS when not used.
11	MIC1M/LINE1M	input	Microphone or line input, differential only (-); connect 0.47-µF capacitor to AVSS when not used.
12	MIC2P/LINE2P	input	Microphone or line input configurable as differential (+) or single-ended; connect 0.47-µF capacitor to AVSS when not used.
13	MIC2M/LINE2M	input	Microphone or line input, differential only (-); connect 0.47-µF capacitor to AVSS when not used.
14	MICDET	input	Microphone detection input; leave floating when not used.
15	MICBIAS	output	Microphone bias voltage output programmable to 2 V, 2.5 V, or AVDD with 4 mA output current drive capability; leave floating when not used.
16	NC	unconnected	Not connected; always leave floating.
17	AVSS	power_in	Analog ground supply.
18	DRVDD	power_in	Analog ADC and output driver voltage supply with range 2.7 V to 3.6 V; connect 1-µF and 0.1-µF decoupling capacitors in parallel to DRVSS.
19	NC	unconnected	Not connected; always leave floating.
20	NC	unconnected	Not connected; always leave floating.
21	DRVSS	power_in	Analog output driver ground supply; connect device thermal pad to DRVSS.
22	HPCOM	output	High-power output driver configured as single-ended output, differential output (-), or VCM output with programmable gain and muting.
23	HPOUT	output	High-power output driver configured as single-ended output or differential output (+), capable of delivering 30 mW into 16 Ω load.
24	DRVDD	power_in	Analog ADC and output driver voltage supply with range 2.7 V to 3.6 V; connect 1-µF and 0.1-µF decoupling capacitors in parallel to DRVSS.
25	AVDD	power_in	Analog DAC voltage supply with range 2.7 V to 3.6 V; connect 1-µF and 0.1-µF decoupling capacitors in parallel to AVSS.
26	AVSS	power_in	Analog ground supply.
27	LEFT_LOP	output	Left line output (+) driver for fully differential line output with 10 kΩ minimum load resistance; leave floating when not used.
28	LEFT_LOM	output	Left line output (-) driver for fully differential line output with 10 kΩ minimum load resistance; leave floating when not used.
29	RIGHT_LOP	output	Right line output (+) driver for fully differential line output with 10 kΩ minimum load resistance; leave floating when not used.
30	RIGHT_LOM	output	Right line output (-) driver for fully differential line output with 10 kΩ minimum load resistance; leave floating when not used.
31	RESET	input	Hardware reset input; must be driven low for at least 10 ns after all power supplies reach specified values.
32	DVDD	power_in	Digital core voltage supply with range 1.525 V to 1.95 V; connect 1-µF and 0.1-µF decoupling capacitors in parallel to DVSS.
33	Thermal Pad	passive	Exposed pad (from the footprint; not named in the datasheet pin table).

Key specifications

Parameter	Value
Manufacturer	Texas Instruments
Package	VQFN-32(5x5)
Category	Interface
Pins	33

CAD (KiCad official)

Symbol: 6PAIC3109TRHBRQ1
Footprint: Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm
3D model: VQFN-32(5x5) (KiCad packages3D, STEP)
3D model files: 6paic3109trhbrq1-etched.step / 6paic3109trhbrq1-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 6paic3109trhbrq1.step / 6paic3109trhbrq1.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: Texas Instruments datasheet (121 pp, sha256 b0c8b8a81089e49c, retrieved 2026-09-26, tier: lcsc)
Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
Extractor: parts-factory 2.0.0 / extract_pins 0.2, primary claude-haiku-4-5-20251001 (text), consensus claude-sonnet-4-6 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF