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6PAIC3106IRGZRQ1
Public Made by Adomby adom
Texas Instruments Audio Interface ICs, VQFN-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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6PAIC3106IRGZRQ1
Texas Instruments · Audio Interface ICs · VQFN-48(7x7)
6PAIC3106IRGZRQ1 from Texas Instruments, in a VQFN-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SCL | bidirectional | I2C serial clock or GPIO; used as the I2C clock when SELECT is tied low. |
| 2 | SDA | bidirectional | I2C serial data input and output or GPIO. |
| 3 | LINE1LP | input | MIC1 or Line1 analog input (left+ or multifunction), programmable as single-ended or fully differential. |
| 4 | LINE1LM | input | MIC1 or Line1 analog input (left- or multifunction), programmable as single-ended or fully differential. |
| 5 | LINE1RP | input | MIC1 or Line1 analog input (right+ or multifunction), programmable as single-ended or fully differential. |
| 6 | LINE1RM | input | MIC1 or Line1 analog input (right- or multifunction), programmable as single-ended or fully differential. |
| 7 | LINE2LP | input | MIC2 or Line2 analog input (left+ or multifunction), programmable as single-ended or fully differential. |
| 8 | LINE2LM | input | MIC2 or Line2 analog input (left- or multifunction), programmable as single-ended or fully differential. |
| 9 | LINE2RP | input | MIC2 or Line2 analog input (right+ or multifunction), programmable as single-ended or fully differential. |
| 10 | LINE2RM | input | MIC2 or Line2 analog input (right- or multifunction), programmable as single-ended or fully differential. |
| 11 | MIC3L | input | MIC3 input (left or multifunction). |
| 12 | MICDET | input | Microphone detect input. |
| 13 | MICBIAS | output | Microphone bias voltage output. |
| 14 | MIC3R | input | MIC3 input (right or multifunction). |
| 15 | AVSS_ADC | power_in | Analog ADC ground supply, 0 V. |
| 16 | DRVDD | power_in | ADC analog and output driver voltage supply, 2.7 V to 3.6 V. |
| 17 | DRVDD | power_in | ADC analog and output driver voltage supply, 2.7 V to 3.6 V. |
| 18 | HPLOUT | output | High-power output driver (left+). |
| 19 | HPLCOM | output | High-power output driver (left- or multifunctional). |
| 20 | DRVSS | power_in | Analog output driver ground supply, 0 V. |
| 21 | DRVSS | power_in | Analog output driver ground supply, 0 V. |
| 22 | HPRCOM | output | High-power output driver (right- or multifunctional). |
| 23 | HPROUT | output | High-power output driver (right+). |
| 24 | DRVDD | power_in | ADC analog and output driver voltage supply, 2.7 V to 3.6 V. |
| 25 | AVDD_DAC | power_in | Analog DAC voltage supply, 2.7 V to 3.6 V. |
| 26 | AVSS_DAC | power_in | Analog DAC ground supply, 0 V. |
| 27 | MONO_LOP | output | Mono line output (+). |
| 28 | MONO_LOM | output | Mono line output (-). |
| 29 | LEFT_LOP | output | Left line output (+). |
| 30 | LEFT_LOM | output | Left line output (-). |
| 31 | RIGHT_LOP | output | Right line output (+). |
| 32 | RIGHT_LOM | output | Right line output (-). |
| 33 | RESET | input | Active-low reset input. |
| 34 | GPIO2 | bidirectional | General-purpose I/O 2: input and output, digital microphone data input, PLL clock input, or audio serial data bus bit clock. |
| 35 | GPIO1 | bidirectional | General-purpose I/O 1: input and output, PLL, clock mux output, short circuit interrupt, AGC noise flag, digital microphone clock, or audio serial data bus word clock. |
| 36 | DVDD | power_in | Digital core voltage supply, 1.65 V to 1.95 V. |
| 37 | MCLK | input | Master clock input. |
| 38 | BCLK | bidirectional | Audio serial data bus bit clock (I/O). |
| 39 | WCLK | bidirectional | Audio serial data bus word clock (I/O). |
| 40 | DIN | input | Audio serial data bus data input. |
| 41 | DOUT | output | Audio serial data bus data output. |
| 42 | DVSS | power_in | Digital core and I/O ground supply, 0 V. |
| 43 | SELECT | input | Control mode select pin (1 = SPI, 0 = I2C). |
| 44 | IOVDD | power_in | I/O voltage supply, 1.1 V to 3.6 V. |
| 45 | MFP0 | bidirectional | Multifunction pin 0: SPI chip select, GPI, or I2C address pin #0. |
| 46 | MFP1 | bidirectional | Multifunction pin 1: SPI serial clock, GPI, or I2C address pin #1. |
| 47 | MFP2 | bidirectional | Multifunction pin 2: SPI MISO slave serial data output or GPIO. |
| 48 | MFP3 | bidirectional | Multifunction pin 3: SPI MOSI slave serial data input, GPI, or audio serial data bus data input. |
| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-48(7x7) |
| Category | Interface |
| Pins | 49 |
CAD (KiCad official)
- Symbol:
6PAIC3106IRGZRQ1 - Footprint:
Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm - 3D model: VQFN-48(7x7) (KiCad packages3D, STEP)
- 3D model files:
6paic3106irgzrq1-etched.step/6paic3106irgzrq1-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);6paic3106irgzrq1.step/6paic3106irgzrq1.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Texas Instruments datasheet (104 pp, sha256
078b8061085231a6, retrieved 2026-10-08, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 6PAIC3106IRGZRQ1
**Texas Instruments** · Audio Interface ICs · VQFN-48(7x7)
6PAIC3106IRGZRQ1 from Texas Instruments, in a VQFN-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SCL | bidirectional | I2C serial clock or GPIO; used as the I2C clock when SELECT is tied low. |
| 2 | SDA | bidirectional | I2C serial data input and output or GPIO. |
| 3 | LINE1LP | input | MIC1 or Line1 analog input (left+ or multifunction), programmable as single-ended or fully differential. |
| 4 | LINE1LM | input | MIC1 or Line1 analog input (left- or multifunction), programmable as single-ended or fully differential. |
| 5 | LINE1RP | input | MIC1 or Line1 analog input (right+ or multifunction), programmable as single-ended or fully differential. |
| 6 | LINE1RM | input | MIC1 or Line1 analog input (right- or multifunction), programmable as single-ended or fully differential. |
| 7 | LINE2LP | input | MIC2 or Line2 analog input (left+ or multifunction), programmable as single-ended or fully differential. |
| 8 | LINE2LM | input | MIC2 or Line2 analog input (left- or multifunction), programmable as single-ended or fully differential. |
| 9 | LINE2RP | input | MIC2 or Line2 analog input (right+ or multifunction), programmable as single-ended or fully differential. |
| 10 | LINE2RM | input | MIC2 or Line2 analog input (right- or multifunction), programmable as single-ended or fully differential. |
| 11 | MIC3L | input | MIC3 input (left or multifunction). |
| 12 | MICDET | input | Microphone detect input. |
| 13 | MICBIAS | output | Microphone bias voltage output. |
| 14 | MIC3R | input | MIC3 input (right or multifunction). |
| 15 | AVSS_ADC | power_in | Analog ADC ground supply, 0 V. |
| 16 | DRVDD | power_in | ADC analog and output driver voltage supply, 2.7 V to 3.6 V. |
| 17 | DRVDD | power_in | ADC analog and output driver voltage supply, 2.7 V to 3.6 V. |
| 18 | HPLOUT | output | High-power output driver (left+). |
| 19 | HPLCOM | output | High-power output driver (left- or multifunctional). |
| 20 | DRVSS | power_in | Analog output driver ground supply, 0 V. |
| 21 | DRVSS | power_in | Analog output driver ground supply, 0 V. |
| 22 | HPRCOM | output | High-power output driver (right- or multifunctional). |
| 23 | HPROUT | output | High-power output driver (right+). |
| 24 | DRVDD | power_in | ADC analog and output driver voltage supply, 2.7 V to 3.6 V. |
| 25 | AVDD_DAC | power_in | Analog DAC voltage supply, 2.7 V to 3.6 V. |
| 26 | AVSS_DAC | power_in | Analog DAC ground supply, 0 V. |
| 27 | MONO_LOP | output | Mono line output (+). |
| 28 | MONO_LOM | output | Mono line output (-). |
| 29 | LEFT_LOP | output | Left line output (+). |
| 30 | LEFT_LOM | output | Left line output (-). |
| 31 | RIGHT_LOP | output | Right line output (+). |
| 32 | RIGHT_LOM | output | Right line output (-). |
| 33 | RESET | input | Active-low reset input. |
| 34 | GPIO2 | bidirectional | General-purpose I/O 2: input and output, digital microphone data input, PLL clock input, or audio serial data bus bit clock. |
| 35 | GPIO1 | bidirectional | General-purpose I/O 1: input and output, PLL, clock mux output, short circuit interrupt, AGC noise flag, digital microphone clock, or audio serial data bus word clock. |
| 36 | DVDD | power_in | Digital core voltage supply, 1.65 V to 1.95 V. |
| 37 | MCLK | input | Master clock input. |
| 38 | BCLK | bidirectional | Audio serial data bus bit clock (I/O). |
| 39 | WCLK | bidirectional | Audio serial data bus word clock (I/O). |
| 40 | DIN | input | Audio serial data bus data input. |
| 41 | DOUT | output | Audio serial data bus data output. |
| 42 | DVSS | power_in | Digital core and I/O ground supply, 0 V. |
| 43 | SELECT | input | Control mode select pin (1 = SPI, 0 = I2C). |
| 44 | IOVDD | power_in | I/O voltage supply, 1.1 V to 3.6 V. |
| 45 | MFP0 | bidirectional | Multifunction pin 0: SPI chip select, GPI, or I2C address pin #0. |
| 46 | MFP1 | bidirectional | Multifunction pin 1: SPI serial clock, GPI, or I2C address pin #1. |
| 47 | MFP2 | bidirectional | Multifunction pin 2: SPI MISO slave serial data output or GPIO. |
| 48 | MFP3 | bidirectional | Multifunction pin 3: SPI MOSI slave serial data input, GPI, or audio serial data bus data input. |
| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Texas Instruments |
| Package | VQFN-48(7x7) |
| Category | Interface |
| Pins | 49 |
## CAD (KiCad official)
- Symbol: `6PAIC3106IRGZRQ1`
- Footprint: `Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm`
- 3D model: VQFN-48(7x7) (KiCad packages3D, STEP)
- 3D model files: `6paic3106irgzrq1-etched.step` / `6paic3106irgzrq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `6paic3106irgzrq1.step` / `6paic3106irgzrq1.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/tlv320aic3106-q1) (104 pp, sha256 `078b8061085231a6`, retrieved 2026-10-08, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/6paic3106irgzrq1-datasheet.pdf)