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Contents

README

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6N137

onsemi · High-speed logic optocoupler · PDIP-8

A high-speed optocoupler for isolating digital signals, in DIP-8. An input LED (anode/cathode) drives an internal photodiode and a logic-gate output stage, giving a clean open-collector logic output that keeps up to 10 Mbit/s, far faster than a phototransistor optocoupler like the PC817. An output enable pin (VE) gates the output and lets several share a bus. It is the standard way to cross an isolation barrier for a UART, SPI clock, encoder signal, or gate-drive command while blocking high voltage and breaking ground loops. Needs a pull-up on the open-collector output. Pin 4 is not connected.

Pinout

Pin Name Type Function
1 NC unconnected No internal connection. Leave floating or tie to ground per PCB layout preference.
2 ANODE input Anode of the input AlGaAs LED. Typical forward current IF = 5 mA (max 15 mA), VF ~1.4-1.75 V. Drive with a current-limiting resistor from the logic source.
3 CATHODE input Cathode of the input AlGaAs LED. Return path for the LED forward current; typically driven low by the source logic gate through a series resistor.
5 GND power_in Output-side ground reference. Must be well-decoupled to VCC (pin 8) with a 0.1 uF ceramic capacitor placed close to the device.
6 VO output Open-collector Schottky-clamped output. Requires an external pull-up resistor (typ. 350 Ω to VCC). Sinks up to 13 mA in the low state; propagation delay ~48 ns (10 MBd data rate).
7 VE input Enable input. When held high (or left open with internal pull-up considerations), the output responds to LED current. When pulled low, the output is disabled (held high). Tie to VCC if not used.
8 VCC power_in Output-side supply voltage, 4.5 V to 5.5 V (absolute max 7 V). Bypass to GND (pin 5) with a 0.1 uF ceramic capacitor placed close to the device.

Key specifications

Parameter Value
Type High-speed logic optocoupler
Data rate 10 Mbit/s
Input LED (anode/cathode)
Output open-collector logic (needs pull-up)
Enable VE output-enable pin
Isolation ~3750 Vrms
CTR/coupling logic-level (not linear)
Package PDIP-8 (pin 4 = NC)

Ordering variants

  • 6N137 (PDIP-8)
  • 6N137S (SOIC-8, gull-wing)

CAD (KiCad official)

  • Symbol: Isolator:6N137
  • Footprint: Package_DIP:DIP-8_W7.62mm
  • 3D model: DIP-8 (KiCad packages3D)
  • 3D model files: 6n137-etched.step / 6n137-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 6n137.step / 6n137.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (12 pp, sha256 4926d748b1db9af4, retrieved 2026-08-17, tier: manufacturer)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF