component
6N136
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Everlight Elec Logic Output Optoisolators, DIP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
3D Model
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Symbol & Footprint
Schematic Symbol
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PCB Footprint
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Datasheet
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Contents
README
markdown6N136
Everlight Elec · Logic Output Optoisolators · DIP-8
6N136 from Everlight Elec, in a DIP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | NC | unconnected | No connection, listed as 'No Connection' in the pin configuration. |
| 2 | Anode | passive | Anode of the infrared emitting diode; the datasheet rates forward current IF at 25 mA max and reverse voltage VR at 5 V max. |
| 3 | Cathode | passive | Cathode of the infrared emitting diode; the datasheet rates forward current IF at 25 mA max and reverse voltage VR at 5 V max. |
| 4 | NC | unconnected | No connection, listed as 'No Connection' in the pin configuration. |
| 5 | GND | power_in | Ground connection of the output-side photodetector and transistor stage, used for high speed logic ground isolation. |
| 6 | Vout | output | Output of the open-collector output transistor; the datasheet rates output voltage VO at -0.5 to 20 V, average output current IO(AVG) at 8 mA and peak output current IO(PK) at 16 mA. |
| 7 | VB | power_in | Separate connection for the photodiode bias, which reduces input base-collector capacitance to increase switching speed. |
| 8 | VCC | power_in | Supply voltage pin; the datasheet rates VCC at -0.5 to 30 V absolute maximum. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Everlight Elec |
| Package | DIP-8 |
| Category | Optoisolators |
| Pins | 8 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Current Transfer Ratio (IF=16mA, VO=0.4V, VCC=4.5V) | CTR | 19 | 50 | % | IF = 16mA, VO = 0.4V, VCC=4.5V, TA=25°C | 3 | |
| Current Transfer Ratio (IF=16mA, VO=0.5V, VCC=4.5V) | CTR | 15 | % | IF = 16mA, VO = 0.5V, VCC=4.5V | 3 | ||
| Logic Low Output Voltage (IO=3mA) | VOL | 0.25 | 0.4 | V | IF = 16mA, IO = 3mA, VCC=4.5V, TA=25°C | 3 | |
| Logic Low Output Voltage (IO=2.4mA) | VOL | 0.5 | V | IF = 16mA, IO = 2.4mA, VCC=4.5V | 3 | ||
| Reverse Voltage | VR | 5 | V | IR = 10μA | 3 | ||
| Forward Voltage | VF | 1.45 | 1.8 | V | IF =16mA | 3 | |
| Logic High Output Current | IOH | 0.001 | 0.5 | µA | IF=0mA, VO=VCC=5.5V, TA=25°C | 3 | |
| Logic High Output Current | IOH | 0.01 | 1 | µA | IF=0mA, VO=VCC=15V, TA=25°C | 3 | |
| Logic High Output Current | IOH | 50 | µA | IF=0mA, VO=VCC=15V | 3 | ||
| Logic Low Supply Current | ICCL | 140 | 200 | µA | IF=16mA, VO=Open, VCC=15V | 3 | |
| Logic High Supply Current | ICCH | 0.01 | 1 | µA | IF=0mA, VO=Open, VCC=15V, TA=25°C | 3 | |
| Logic High Supply Current | ICCH | 2 | µA | IF=0mA, VO=Open, VCC=15V | 3 | ||
| Propagation Delay Time to Logic Low (RL=1.9KΩ, TA=25°C) | TPHL | 0.35 | 0.8 | µs | RL=1.9KΩ, TA=25°C; IF=16mA, Vcc=5V | 4 | |
| Propagation Delay Time to Logic Low (RL=1.9KΩ) | TPHL | 1 | µs | RL =1.9KΩ; IF=16mA, Vcc=5V | 4 | ||
| Propagation Delay Time to Logic High (RL=1.9KΩ, TA=25°C) | TPLH | 0.3 | 0.8 | µs | RL =1.9KΩ, TA=25°C; IF=16mA, Vcc=5V | 4 | |
| Propagation Delay Time to Logic High (RL=1.9KΩ) | TPLH | 1 | µs | RL =1.9KΩ; IF=16mA, Vcc=5V | 4 | ||
| Common Mode Transient Immunity at Logic High | CMH | 1000 | V/µs | IF = 0mA, VCM=10Vp-p, RL=1.9KΩ, TA=25°C | 4 | ||
| Common Mode Transient Immunity at Logic Low | CML | 1000 | V/µs | IF = 16mA, VCM=10Vp-p, RL=1.9KΩ, TA=25°C | 4 | ||
| Temperature coefficient of forward voltage | VF/TA | -1.9 | mV/°C | IF =16mA | 3 | ||
| Forward current | IF | 25 | mA | 2 | |||
| Peak forward current | IFP | 50 | mA | 50% duty, 1ms P.W | 2 | ||
| Peak transient current | IFtrans | 1 | A | ≤1μs P.W, 300pps | 2 | ||
| Reverse voltage | VR | 5 | V | 2 | |||
| Input power dissipation | PIN | 45 | mW | 2 | |||
| Output power dissipation | PO | 100 | mW | 2 | |||
| Emitter-Base reverse voltage (6N136) | VEBR | 5 | V | 2 | |||
| Base current (6N136) | IB | 5 | mA | 2 | |||
| Average output current | IO(AVG) | 8 | mA | 2 | |||
| Peak output current | IO(PK) | 16 | mA | 2 | |||
| Output voltage | VO | -0.5 | 20 | V | 2 | ||
| Supply voltage | VCC | -0.5 | 30 | V | 2 | ||
| Total power dissipation | PTOT | 200 | mW | 2 | |||
| Isolation voltage | VISO | 5000 | Vrms | AC for 1 minute, R.H. 40-60%; pins 1-4 shorted together, pins 5-8 shorted together | 2 | ||
| Operating temperature | TOPR | -55 | 100 | °C | 2 | ||
| Storage temperature | TSTG | -55 | 125 | °C | 2 | ||
| Soldering temperature | TSOL | 260 | °C | For 10 seconds | 2 |
Materials and finish
As the datasheet states them (page.json metadata.appearance; the 3D model's colours follow it).
| Part | Material | Colour / plating | Datasheet says | Page |
|---|---|---|---|---|
| housing | PC | 1.1 (A) Maximum Body Case Temperature Profile for evaluation of Reflow Profile Note: Reference: IPC/JEDEC J-STD-020D | 12 |
CAD (KiCad official)
- Symbol:
6N136 - Footprint:
Package_DIP:DIP-8_W7.62mm - 3D model: DIP-8 (KiCad packages3D, STEP)
- 3D model files:
6n136-etched.step/6n136-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);6n136.step/6n136.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Everlight Elec datasheet (13 pp, sha256
6e3f09492d1ba264, retrieved 2026-10-24, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).