component
5PB1108PGGK
Public Made by Adomby adom
RENESAS Clock Buffers, Drivers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "5pb1108pggk",
"version": "0.1.0",
"type": "component",
"description": "RENESAS Clock Buffers, Drivers, TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"clock and timing",
"5pb1108pggk",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"5pb1108pggk.kicad_sym",
"5pb1108pggk.kicad_mod",
"5pb1108pggk.glb",
"5pb1108pggk.step",
"5pb1108pggk.lbr",
"docs/hero.png",
"docs/5pb1108pggk-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"5pb1108pggk-hero.glb",
"5pb1108pggk-hero.overlay.json",
"5pb1108pggk-etched.glb"
],
"component": {
"mpn": "5PB1108PGGK",
"manufacturer": "RENESAS",
"package": "TSSOP-16",
"pin_count": 16,
"category": "Clock and Timing",
"subcategory": "Clock Buffers, Drivers",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/d00ed856d2a54902fd13bdfa8a33c6e4.pdf",
"parts": {
"symbol": "5pb1108pggk.kicad_sym",
"footprint": "5pb1108pggk.kicad_mod",
"model_3d": "5pb1108pggk-hero.glb",
"model_3d_plain": "5pb1108pggk-etched.glb",
"model_3d_step": "5pb1108pggk-etched.step",
"model_3d_step_plain": "5pb1108pggk.step",
"lbr": "5pb1108pggk.lbr"
},
"distributor_links": {
"lcsc": "C1018173",
"digikey": "6690-5PB1108PGGK-ND",
"mouser": "972-5PB1108PGGK"
},
"distributor_check": {
"checked_at": "2026-10-30T22:02:11Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "6690-5PB1108PGGK-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "972-5PB1108PGGK",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "CLKIN",
"type": "input",
"description": "LVCMOS clock input that is 3.3 V tolerant, with VIH minimum of 0.7 × VDD and VIL maximum of 0.3 × VDD."
},
{
"number": "2",
"name": "1G",
"type": "input",
"description": "Output enable input: when high, the Yn outputs follow CLKIN; when low, the Yn outputs are held low (VIH minimum 2.0 V and VIL maximum 0.8 V at VDD = 3.3 V)."
},
{
"number": "3",
"name": "Y0",
"type": "output",
"description": "LVCMOS clock output with integrated 50 Ω serial termination, VOH minimum 2.4 V and VOL maximum 0.7 V at VDD = 3.3 V."
},
{
"number": "4",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the device."
},
{
"number": "5",
"name": "VDD",
"type": "power_in",
"description": "Supply voltage of 1.71 V to 3.465 V, measured with respect to GND."
},
{
"number": "6",
"name": "Y4",
"type": "output",
"description": "LVCMOS clock output with integrated 50 Ω serial termination, VOH minimum 2.4 V and VOL maximum 0.7 V at VDD = 3.3 V."
},
{
"number": "7",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the device."
},
{
"number": "8",
"name": "Y6",
"type": "output",
"description": "LVCMOS clock output with integrated 50 Ω serial termination, VOH minimum 2.4 V and VOL maximum 0.7 V at VDD = 3.3 V."
},
{
"number": "9",
"name": "Y7",
"type": "output",
"description": "LVCMOS clock output with integrated 50 Ω serial termination, VOH minimum 2.4 V and VOL maximum 0.7 V at VDD = 3.3 V."
},
{
"number": "10",
"name": "VDD",
"type": "power_in",
"description": "Supply voltage of 1.71 V to 3.465 V, measured with respect to GND."
},
{
"number": "11",
"name": "Y5",
"type": "output",
"description": "LVCMOS clock output with integrated 50 Ω serial termination, VOH minimum 2.4 V and VOL maximum 0.7 V at VDD = 3.3 V."
},
{
"number": "12",
"name": "GND",
"type": "power_in",
"description": "Ground reference for the device."
},
{
"number": "13",
"name": "Y2",
"type": "output",
"description": "LVCMOS clock output with integrated 50 Ω serial termination, VOH minimum 2.4 V and VOL maximum 0.7 V at VDD = 3.3 V."
},
{
"number": "14",
"name": "VDD",
"type": "power_in",
"description": "Supply voltage of 1.71 V to 3.465 V, measured with respect to GND."
},
{
"number": "15",
"name": "Y3",
"type": "output",
"description": "LVCMOS clock output with integrated 50 Ω serial termination, VOH minimum 2.4 V and VOL maximum 0.7 V at VDD = 3.3 V."
},
{
"number": "16",
"name": "Y1",
"type": "output",
"description": "LVCMOS clock output with integrated 50 Ω serial termination, VOH minimum 2.4 V and VOL maximum 0.7 V at VDD = 3.3 V."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: Conflicting datasheet text on output enable: the Description (page 1) calls OE synchronous and glitc; Pin-to-output assignments were read from the figure text, which is scrambled in extraction. They wer; The 1G input thresholds are given per supply voltage (1.8 V, 2.5 V, 3.3 V); the 3.3 V values were us"
],
"pages_sent": 41,
"cost_usd": 0.1112,
"at": "2026-10-30T22:01:57"
},
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/d00ed856d2a54902fd13bdfa8a33c6e4.pdf",
"pages": 41,
"sha256": "a39aca2d9b003582",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 16,
"described": 16,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "5pb1108pggk.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.4,
5.0,
1.1
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "6ad5e98224d02a427d9a6b929a28dbc158b9925fba5adec12db05079f1016948",
"checked": "2026-10-30",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "5pb1108pggk-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.4,
5.0,
1.1
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "6b6721c3a1b2a461f9e6dfbc5d03736a0e0b3fdf502484e4bd9bf5f46e9be019",
"checked": "2026-10-30",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
],
"package_dims": {
"package_code": "PGG16T1",
"source_page": 29,
"e": {
"nom_mm": 0.65,
"range_mm": [
null,
null
]
},
"source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
"model_check": {
"file": "5pb1108pggk.step",
"verdict": "SKIP",
"reasons": [
"the datasheet dimensions give no height or body size to compare"
],
"by": "factory/package_fit.py"
}
}
}
}