component
5PB1106PGGI
Public Made by Adomby adom
RENESAS Clock Buffers, Drivers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "5pb1106pggi",
"version": "0.1.0",
"type": "component",
"description": "RENESAS Clock Buffers, Drivers, TSSOP-14. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"clock and timing",
"5pb1106pggi",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"5pb1106pggi.kicad_sym",
"5pb1106pggi.kicad_mod",
"5pb1106pggi.glb",
"5pb1106pggi.step",
"5pb1106pggi.lbr",
"docs/hero.png",
"docs/5pb1106pggi-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"5pb1106pggi-hero.glb",
"5pb1106pggi-hero.overlay.json",
"5pb1106pggi-etched.glb"
],
"component": {
"mpn": "5PB1106PGGI",
"manufacturer": "RENESAS",
"package": "TSSOP-14",
"pin_count": 14,
"category": "Clock and Timing",
"subcategory": "Clock Buffers, Drivers",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/d00ed856d2a54902fd13bdfa8a33c6e4.pdf",
"parts": {
"symbol": "5pb1106pggi.kicad_sym",
"footprint": "5pb1106pggi.kicad_mod",
"model_3d": "5pb1106pggi-hero.glb",
"model_3d_plain": "5pb1106pggi-etched.glb",
"model_3d_step": "5pb1106pggi-etched.step",
"model_3d_step_plain": "5pb1106pggi.step",
"lbr": "5pb1106pggi.lbr"
},
"distributor_links": {
"lcsc": "C1527293",
"digikey": "6690-5PB1106PGGI-ND",
"mouser": "972-5PB1106PGGI"
},
"distributor_check": {
"checked_at": "2026-10-30T22:54:51Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "6690-5PB1106PGGI-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "972-5PB1106PGGI",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "CLKIN",
"type": "input",
"description": "LVCMOS clock input that is 3.3 V tolerant, with a maximum input frequency of 200 MHz and an absolute input voltage range of -0.4 V to 3.465 V."
},
{
"number": "2",
"name": "1G",
"type": "input",
"description": "Output enable input: with 1G low the Yn outputs are held low, and with 1G high the outputs follow CLKIN; VIH is 2.0 V minimum and VIL is 0.8 V maximum at VDD = 3.3 V."
},
{
"number": "3",
"name": "Y0",
"type": "output",
"description": "LVCMOS clock output with integrated 50 Ω serial termination; at VDD = 3.3 V it provides VOH of 2.4 V minimum at -12 mA and VOL of 0.7 V maximum at 12 mA."
},
{
"number": "4",
"name": "GND",
"type": "power_in",
"description": "Ground reference pin for the device."
},
{
"number": "5",
"name": "VDD",
"type": "power_in",
"description": "Supply pin; the power supply voltage measured with respect to GND must be between 1.71 V and 3.465 V."
},
{
"number": "6",
"name": "Y4",
"type": "output",
"description": "LVCMOS clock output with integrated 50 Ω serial termination; at VDD = 3.3 V it provides VOH of 2.4 V minimum at -12 mA and VOL of 0.7 V maximum at 12 mA."
},
{
"number": "7",
"name": "GND",
"type": "power_in",
"description": "Ground reference pin for the device."
},
{
"number": "8",
"name": "VDD",
"type": "power_in",
"description": "Supply pin; the power supply voltage measured with respect to GND must be between 1.71 V and 3.465 V."
},
{
"number": "9",
"name": "Y5",
"type": "output",
"description": "LVCMOS clock output with integrated 50 Ω serial termination; at VDD = 3.3 V it provides VOH of 2.4 V minimum at -12 mA and VOL of 0.7 V maximum at 12 mA."
},
{
"number": "10",
"name": "GND",
"type": "power_in",
"description": "Ground reference pin for the device."
},
{
"number": "11",
"name": "Y2",
"type": "output",
"description": "LVCMOS clock output with integrated 50 Ω serial termination; at VDD = 3.3 V it provides VOH of 2.4 V minimum at -12 mA and VOL of 0.7 V maximum at 12 mA."
},
{
"number": "12",
"name": "VDD",
"type": "power_in",
"description": "Supply pin; the power supply voltage measured with respect to GND must be between 1.71 V and 3.465 V."
},
{
"number": "13",
"name": "Y3",
"type": "output",
"description": "LVCMOS clock output with integrated 50 Ω serial termination; at VDD = 3.3 V it provides VOH of 2.4 V minimum at -12 mA and VOL of 0.7 V maximum at 12 mA."
},
{
"number": "14",
"name": "Y1",
"type": "output",
"description": "LVCMOS clock output with integrated 50 Ω serial termination; at VDD = 3.3 V it provides VOH of 2.4 V minimum at -12 mA and VOL of 0.7 V maximum at 12 mA."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [
"extractor flagged: The Features list describes the output enable as synchronous and glitch-free, but the Output Logic T; The 50 Ω serial termination and the VOH/VOL values are for the 3.3 V condition only. The datasheet g; Table 1 assigns GND to pins 4, 7 and 10 for 5PB1106PGG, and the figure matches. The datasheet gives "
],
"pages_sent": 41,
"cost_usd": 0.1107,
"at": "2026-10-30T22:54:37"
},
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/d00ed856d2a54902fd13bdfa8a33c6e4.pdf",
"pages": 41,
"sha256": "a39aca2d9b003582",
"source_tier": "mfr"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 14,
"described": 14,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "5pb1106pggi.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.4,
5.0,
1.0
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "3ee5786aae56190997aa793ba3cfc003fd616782770e29719b4562f012982245",
"checked": "2026-10-30",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "5pb1106pggi-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.4,
5.0,
1.0
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "3cbb7a0be107fea592cafc147edc2e1b6b126142dbc712642e2067008924468c",
"checked": "2026-10-30",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
],
"package_dims": {
"package_code": "PGG14T1",
"source_page": 27,
"e": {
"nom_mm": 0.65,
"range_mm": [
null,
null
]
},
"source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
"model_check": {
"file": "5pb1106pggi.step",
"verdict": "SKIP",
"reasons": [
"the datasheet dimensions give no height or body size to compare"
],
"by": "factory/package_fit.py"
}
}
}
}