5PB1102PGGK

{
  "slug": "5pb1102pggk",
  "version": "0.1.0",
  "type": "component",
  "description": "RENESAS Clock Buffers, Drivers, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
  "tags": [
    "component",
    "clock and timing",
    "5pb1102pggk",
    "factory-2.0.0",
    "extractor-text"
  ],
  "dependencies": {},
  "hero": {
    "type": "image",
    "path": "docs/hero.png"
  },
  "files": [
    "page.json",
    "README.md",
    "5pb1102pggk.kicad_sym",
    "5pb1102pggk.kicad_mod",
    "5pb1102pggk.glb",
    "5pb1102pggk.step",
    "5pb1102pggk.lbr",
    "docs/hero.png",
    "docs/5pb1102pggk-datasheet.pdf",
    "viewers/symbol.html",
    "viewers/footprint.html",
    "5pb1102pggk-hero.glb",
    "5pb1102pggk-hero.overlay.json",
    "5pb1102pggk-etched.glb"
  ],
  "component": {
    "mpn": "5PB1102PGGK",
    "manufacturer": "RENESAS",
    "package": "TSSOP-8",
    "pin_count": 8,
    "category": "Clock and Timing",
    "subcategory": "Clock Buffers, Drivers",
    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/d00ed856d2a54902fd13bdfa8a33c6e4.pdf",
    "parts": {
      "symbol": "5pb1102pggk.kicad_sym",
      "footprint": "5pb1102pggk.kicad_mod",
      "model_3d": "5pb1102pggk-hero.glb",
      "model_3d_plain": "5pb1102pggk-etched.glb",
      "model_3d_step": "5pb1102pggk-etched.step",
      "model_3d_step_plain": "5pb1102pggk.step",
      "lbr": "5pb1102pggk.lbr"
    },
    "distributor_links": {
      "lcsc": "C1545791",
      "digikey": "6690-5PB1102PGGK-ND",
      "mouser": "972-5PB1102PGGK"
    },
    "distributor_check": {
      "checked_at": "2026-11-06T00:02:04Z",
      "source": "Component Ocean /api/assign-pns",
      "digikey": {
        "pn": "6690-5PB1102PGGK-ND",
        "status": "found",
        "lifecycle": "Active"
      },
      "mouser": {
        "pn": "972-5PB1102PGGK",
        "status": "found"
      }
    },
    "pins": [
      {
        "number": "1",
        "name": "CLKIN",
        "type": "input",
        "description": "LVCMOS clock input that accepts 3.3 V signals, with VIH of at least 0.7 x VDD and VIL of at most 0.3 x VDD, and absolute input voltage limits of -0.4 V to 3.465 V."
      },
      {
        "number": "2",
        "name": "1G",
        "type": "input",
        "description": "Output enable input where driving low forces all outputs Yn low and driving high enables them, with VIH of at least 1.6 V, 1.8 V or 2.0 V and VIL of at most 0.6 V, 0.7 V or 0.8 V at 1.8 V, 2.5 V or 3.3 V VDD respectively."
      },
      {
        "number": "3",
        "name": "Y0",
        "type": "output",
        "description": "LVCMOS clock output with nominal output impedance of 50 Ω, controlled by the 1G output enable."
      },
      {
        "number": "4",
        "name": "GND",
        "type": "power_in",
        "description": "Ground reference pin for the device."
      },
      {
        "number": "5",
        "name": "NC",
        "type": "unconnected",
        "description": "No-connect pin shown as NC in the TSSOP pin assignment for 5PB1102PGG."
      },
      {
        "number": "6",
        "name": "VDD",
        "type": "power_in",
        "description": "Supply pin; the power supply voltage measured with respect to GND must be between 1.71 V and 3.465 V, with an absolute maximum of 3.8 V."
      },
      {
        "number": "7",
        "name": "NC",
        "type": "unconnected",
        "description": "No-connect pin shown as NC in the TSSOP pin assignment for 5PB1102PGG."
      },
      {
        "number": "8",
        "name": "Y1",
        "type": "output",
        "description": "LVCMOS clock output with nominal output impedance of 50 Ω, controlled by the 1G output enable."
      }
    ],
    "provenance": {
      "extractor": "extract_pins 0.3",
      "factory_chain": {
        "factory": "2.0.0",
        "extractor": "extract_pins 0.3",
        "primary_model": "claude-haiku-5-5",
        "primary_mode": "text",
        "consensus_model": "claude-sonnet-5-5",
        "consensus": "agreed",
        "guards": "pin_guards 0.1: passed",
        "guard_notes": [
          "extractor flagged: The Description calls the output enable a synchronous glitch-free function, but the Output Logic Tab; Pins 5 and 7 are NC for the 5PB1102PGG TSSOP-8 pin assignment (Figure 1, Table 1 lists no outputs on; The datasheet has no per-pin description text for the TSSOP package. Pin descriptions were built fro"
        ],
        "pages_sent": 41,
        "cost_usd": 0.1081,
        "at": "2026-11-05T23:59:54"
      },
      "datasheet": {
        "url": "https://datasheet.lcsc.com/datasheet/pdf/d00ed856d2a54902fd13bdfa8a33c6e4.pdf",
        "pages": 41,
        "sha256": "a39aca2d9b003582",
        "source_tier": "mfr"
      },
      "cad": "KiCad official (CC-BY-SA 4.0)",
      "pins": {
        "total": 8,
        "described": 8,
        "cites_pages": true,
        "refuses_to_fabricate": true
      }
    },
    "viewers": {
      "symbol": "viewers/symbol.html",
      "footprint": "viewers/footprint.html"
    },
    "models_3d": [
      {
        "file": "5pb1102pggk.step",
        "role": "plain",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.9,
          3.0,
          1.1
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "cf28a51742b2e31065e201d1b313207140cbfb49062efd938788f7a310d02738",
        "checked": "2026-11-06",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      },
      {
        "file": "5pb1102pggk-etched.step",
        "role": "eda",
        "up": "Z",
        "units": "mm",
        "origin": "footprint origin = pad-pattern centre",
        "seat": "z = 0",
        "extents_mm": [
          4.9,
          3.0,
          1.1
        ],
        "zmin_mm": 0.0,
        "centre_offset_mm": 0.0,
        "footprint_binding": "identity",
        "sha256": "54ded13915d96df393f131ad27419343d1205e4974d0792bb03cdbff33160ea9",
        "checked": "2026-11-06",
        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
      }
    ],
    "package_dims": {
      "package_code": "PGG8D1",
      "source_page": 25,
      "e": {
        "nom_mm": 0.65,
        "range_mm": [
          null,
          null
        ]
      },
      "source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
      "model_check": {
        "file": "5pb1102pggk.step",
        "verdict": "SKIP",
        "reasons": [
          "the datasheet dimensions give no height or body size to compare"
        ],
        "by": "factory/package_fit.py"
      }
    }
  }
}