component

5PB1102PGGK

Public Made by Adom

by adom

RENESAS Clock Buffers, Drivers, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentclock and timing5pb1102pggkfactory-2.0.0extractor-text

Verified 5PB1102PGGK

by Ray · last 6 Nov 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

6 Nov 2026RayPublished by the parts factory: tier mfr, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: 5PB1102PGGK · TSSOP-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 41-page datasheet
  • ✓distributor: lcsc C1545791, digikey 6690-5PB1102PGGK-ND, mouser 972-5PB1102PGGK
  • ✓family: TSSOP-8_3x3mm_P0.65mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-zksm9bnl/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • •package_fit (skip): the datasheet dimensions give no height or body size to compare (datasheet p.25)
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓symbol_text: no pin names collide
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ 5pb1102pggk.kicad_sym✓ 5pb1102pggk.kicad_mod✓ 5pb1102pggk.step
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Ray Publish 0.1.0 50ba90e 3h ago

5PB1102PGGK

RENESAS · Clock Buffers, Drivers · TSSOP-8

5PB1102PGGK from RENESAS, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CLKIN input LVCMOS clock input that accepts 3.3 V signals, with VIH of at least 0.7 x VDD and VIL of at most 0.3 x VDD, and absolute input voltage limits of -0.4 V to 3.465 V.
2 1G input Output enable input where driving low forces all outputs Yn low and driving high enables them, with VIH of at least 1.6 V, 1.8 V or 2.0 V and VIL of at most 0.6 V, 0.7 V or 0.8 V at 1.8 V, 2.5 V or 3.3 V VDD respectively.
3 Y0 output LVCMOS clock output with nominal output impedance of 50 Ω, controlled by the 1G output enable.
4 GND power_in Ground reference pin for the device.
5 NC unconnected No-connect pin shown as NC in the TSSOP pin assignment for 5PB1102PGG.
6 VDD power_in Supply pin; the power supply voltage measured with respect to GND must be between 1.71 V and 3.465 V, with an absolute maximum of 3.8 V.
7 NC unconnected No-connect pin shown as NC in the TSSOP pin assignment for 5PB1102PGG.
8 Y1 output LVCMOS clock output with nominal output impedance of 50 Ω, controlled by the 1G output enable.

Key specifications

Parameter Value
Manufacturer RENESAS
Package TSSOP-8
Category Clock and Timing
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
VDD Operating Voltage VDD 1.71 1.8 1.89 V Industrial and Extended 7
VDD Operating Voltage VDD 2.375 2.5 2.625 V Industrial and Extended 9
VDD Operating Voltage VDD 3.135 3.3 3.465 V Industrial and Extended 11
Input High Voltage, 1G VIH 1.6 V VDD = 1.8V 7
Input High Voltage, 1G VIH 1.8 V VDD = 2.5V 9
Input High Voltage, 1G VIH 2 V VDD = 3.3V 11
Input Low Voltage, 1G VIL 0.6 V VDD = 1.8V 7
Input Low Voltage, 1G VIL 0.7 V VDD = 2.5V 9
Input Low Voltage, 1G VIL 0.8 V VDD = 3.3V 11
Output High Voltage VOH 1.4 V IOH = -5mA. 7
Output High Voltage VOH 1.9 V IOH = -8mA. 9
Output High Voltage VOH 2.4 V IOH = -12mA. 11
Output Low Voltage VOL 0.4 V IOL = 5mA. 7
Output Low Voltage VOL 0.5 V IOL = 8mA. 9
Output Low Voltage VOL 0.7 V IOL = 12mA. 11
Operating Supply Current, 5PB1102 IDD 6 8 mA 100MHz, no load, 25°C. 7
Operating Supply Current, 5PB1102 IDD 9 11 mA 100MHz, no load, 25°C. 9
Operating Supply Current, 5PB1102 IDD 12 13 mA 100MHz, no load, 25°C. 11
Input Frequency 0 200 MHz Industrial and Extended 13
Input Frequency 0 200 MHz Industrial and Extended 15
Input Frequency 0 200 MHz Industrial and Extended 17
Output Rise Time (2pF load) tOR 0.5 0.75 ns 0.36V to 1.44V, CL = 2pF. 13
Output Fall Time (2pF load) tOF 0.5 0.75 ns 1.44V to 0.36V, CL = 2pF. 13
Output Rise Time (5pF load) tOR 0.8 1 ns 0.36V to 1.44V, CL = 5pF. 13
Output Fall Time (5pF load) tOF 0.8 1 ns 1.44V to 0.36V, CL = 5pF. 13
Output Rise Time (2pF load) tOR 0.4 0.7 ns 0.5V to 2.0V, CL = 2pF. 15
Output Fall Time (2pF load) tOF 0.4 0.7 ns 2.0V to 0.5V, CL = 2pF. 15
Output Rise Time (5pF load) tOR 0.75 1 ns 0.5V to 2.0V, CL = 5pF. 15
Output Fall Time (5pF load) tOF 0.75 1 ns 2.0V to 0.5V, CL = 5pF. 15
Output Rise Time (2pF load) tOR 0.45 0.6 ns 0.66V to 2.64V, CL = 2pF. 17
Output Fall Time (2pF load) tOF 0.45 0.6 ns 2.64V to 0.66V, CL = 2pF. 17
Output Rise Time (5pF load) tOR 0.7 1 ns 0.66V to 2.64V, CL = 5pF. 17
Output Fall Time (5pF load) tOF 0.7 1 ns 2.64V to 0.66V, CL = 5pF. 17
Start-up Time tSTART-UP 3 ms Part start-up time for valid outputs after VDD ramp-up. 13
Start-up Time tSTART-UP 3 ms Part start-up time for valid outputs after VDD ramp-up. 15
Start-up Time tSTART-UP 3 ms Part start-up time for valid outputs after VDD ramp-up. 17
Propagation Delay tPD 1.5 2.5 ns With rail-to-rail input clock. 13
Propagation Delay, 5PB1102/04 tPD 1.9 2.9 ns With rail-to-rail input clock. 15
Propagation Delay, 5PB1102/04 tPD 1.7 2.4 ns With rail-to-rail input clock. 17
Output to Output Skew, 5PB1102/04 35 50 ps Rising edges at VDD/2. 13
Output to Output Skew, 5PB1102/04 35 50 ps Rising edges at VDD/2. 15
Output to Output Skew, 5PB1102/04 35 50 ps Rising edges at VDD/2. 17
Ambient Operating Temperature (Extended and Automotive Grade 2) -40 105 C Extended and Automotive Grade 2 5
Power Supply Voltage (measured in respect to GND) VDD 1.71 3.465 V 5
Supply Voltage VDD 3.8 V 5
Output Enable and All Outputs -0.4 V 5
Input Voltage, CLKIN -0.4 3.465 V 5
Ambient Operating Temperature (Extended and Automotive Grade 2) -40 105 C Extended and Automotive Grade 2 5
Storage Temperature -65 150 C 5
Junction Temperature 125 C 5
Soldering Temperature 260 C 5
Thermal Resistance Junction-to-Ambient, 8-TSSOP (5PB1102PGG) ΘJA 122 °C/W still air 6
Thermal Resistance Junction-to-Case, 8-TSSOP (5PB1102PGG) ΘJC 58.2 °C/W still air 6
Thermal Resistance Junction-to-Board, 8-TSSOP (5PB1102PGG) ΘJB 139.3 °C/W still air 6

CAD (KiCad official)

  • Symbol: 5PB1102PGGK
  • Footprint: Package_SO:TSSOP-8_3x3mm_P0.65mm
  • 3D model: TSSOP-8 (KiCad packages3D, STEP)
  • 3D model files: 5pb1102pggk-etched.step / 5pb1102pggk-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 5pb1102pggk.step / 5pb1102pggk.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: RENESAS datasheet (41 pp, sha256 a39aca2d9b003582, retrieved 2026-11-06, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF