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Contents

README

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5P49V6965A000NLGI8

RENESAS · Clock Generators / Frequency Synthesizers / PLL · QFN-24(4x4)

5P49V6965A000NLGI8 from RENESAS, in a QFN-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 CLKIN input Differential clock input with a weak 100kΩ internal pull-down.
2 CLKINB input Complementary differential clock input with a weak 100kΩ internal pull-down.
3 XOUT output Crystal oscillator interface output.
4 XIN/REF input Crystal oscillator interface input or single-ended LVCMOS clock input, with input voltage that needs to be below 1.2V.
5 VDDA power_in Analog functions power supply, connected to 1.8V to 3.3V and at the same voltage as VDDD.
6 CLKSEL input Input clock select in manual switchover mode: 0 = XIN/REF, XOUT (default); 1 = CLKIN, CLKINB.
7 SD/OE input Enables or disables the outputs (OE) or powers down the chip (SD), with an internal pull-down.
8 SEL1/SDA bidirectional Configuration select pin, or I2C SDA input as selected by OUT0_SEL_I2CB, with a weak internal pull-down.
9 SEL0/SCL bidirectional Configuration select pin, or I2C SCL input as selected by OUT0_SEL_I2CB, with a weak internal pull-down.
10 VDDO4 power_in Output power supply, connected to 1.8V to 3.3V, which sets the output voltage levels for OUT4/OUT4B.
11 OUT4 output Output clock 4.
12 OUT4B output Complementary output clock 4.
13 OUT3B output Complementary output clock 3.
14 OUT3 output Output clock 3.
15 VDDO3 power_in Output power supply, connected to 1.8V to 3.3V, which sets the output voltage levels for OUT3/OUT3B.
16 OUT2B output Complementary output clock 2.
17 OUT2 output Output clock 2.
18 VDDO2 power_in Output power supply, connected to 1.8V to 3.3V, which sets the output voltage levels for OUT2/OUT2B.
19 OUT1B output Complementary output clock 1.
20 OUT1 output Output clock 1.
21 VDDO1 power_in Output power supply, connected to 1.8V to 3.3V, which sets the output voltage levels for OUT1/OUT1B.
22 VDDD power_in Digital functions power supply, connected to 1.8V to 3.3V and at the same voltage as VDDA.
23 VDDO0 power_in Power supply for OUT0_SEL_I2CB, connected to 1.8V to 3.3V, which sets the output voltage level for OUT0.
24 OUT0_SEL_I2CB bidirectional Latched input at power-up that selects pins 8 and 9 (hardware select with a 10kΩ pull-up, I2C with a 10kΩ pull-down or floating), then acts as an LVCMOS reference output, with an internal pull-down.
25 GND power_in Ground connection to the ground pad.

Key specifications

Parameter Value
Manufacturer RENESAS
Package QFN-24(4x4)
Category Clock And Timing
Pins 25

CAD (KiCad official)

  • Symbol: 5P49V6965A000NLGI8
  • Footprint: Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm
  • 3D model: QFN-24(4x4) (KiCad packages3D, STEP)
  • 3D model files: 5p49v6965a000nlgi8-etched.step / 5p49v6965a000nlgi8-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 5p49v6965a000nlgi8.step / 5p49v6965a000nlgi8.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: RENESAS datasheet (29 pp, sha256 8b7aaa03f77cdf1d, retrieved 2026-10-28, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF