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5LN01M-TL-H

onsemi · MOSFETs · SOT-323-3

5LN01M-TL-H from onsemi, in a SOT-323-3. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 Gate input Gate terminal of the MOSFET; the absolute maximum gate-to-source voltage is ±10 V.
2 Source passive Source terminal of the MOSFET; the datasheet gives no separate pin-level limit beyond the absolute maximum ratings.
3 Drain passive Drain terminal of the MOSFET; the drain-to-source voltage is rated 50 V and the DC drain current 0.1 A.

Key specifications

Parameter Value
Manufacturer onsemi
Package SOT-323-3
Category Transistors
Pins 3

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Drain to Source Voltage VDSS 50 V 1
Gate to Source Voltage VGSS -10 10 V 1
Drain Current (DC) ID 0.1 A 1
Drain Current (Pulse) IDP 0.4 A PW≤10μs, duty cycle≤1% 1
Allowable Power Dissipation PD 0.15 W 1
Channel Temperature Tch 150 °C 1
Storage Temperature Tstg -55 150 °C 1
Drain to Source Breakdown Voltage V(BR)DSS 50 V ID=1mA, VGS=0V 2
Zero-Gate Voltage Drain Current IDSS 1 μA VDS=50V, VGS=0V 2
Gate to Source Leakage Current IGSS -10 10 μA VGS=±8V, VDS=0V 2
Cutoff Voltage VGS(off) 0.4 1.3 V VDS=10V, ID=100μA 2
Forward Transfer Admittance /yfs/ 0.13 0.18 S VDS=10V, ID=50mA 2
Static Drain to Source On-State Resistance (RDS(on)1) RDS(on)1 6 7.8 Ω ID=50mA, VGS=4V 2
Static Drain to Source On-State Resistance (RDS(on)2) RDS(on)2 7.1 9.9 Ω ID=30mA, VGS=2.5V 2
Static Drain to Source On-State Resistance (RDS(on)3) RDS(on)3 10 20 Ω ID=10mA, VGS=1.5V 2
Diode Forward Voltage VSD 0.85 1.2 V IS=100mA, VGS=0V 2
Input Capacitance Ciss 6.6 pF VDS=10V, f=1MHz 2
Output Capacitance Coss 4.7 pF VDS=10V, f=1MHz 2
Reverse Transfer Capacitance Crss 1.7 pF VDS=10V, f=1MHz 2
Turn-ON Delay Time td(on) 18 ns See specified Test Circuit. 2
Rise Time tr 42 ns See specified Test Circuit. 2
Turn-OFF Delay Time td(off) 190 ns See specified Test Circuit. 2
Fall Time tf 105 ns See specified Test Circuit. 2
Total Gate Charge Qg 1.57 nC VDS=10V, VGS=10V, ID=100mA 2
Gate to Source Charge Qgs 0.2 nC VDS=10V, VGS=10V, ID=100mA 2
Gate to Drain Miller Charge Qgd 0.32 nC VDS=10V, VGS=10V, ID=100mA 2

CAD (KiCad official)

  • Symbol: 5LN01M-TL-H
  • Footprint: Package_TO_SOT_SMD:SOT-323_SC-70
  • 3D model: SOT-323-3 (KiCad packages3D, STEP)
  • 3D model files: 5ln01m-tl-h-etched.step / 5ln01m-tl-h-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 5ln01m-tl-h.step / 5ln01m-tl-h.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: onsemi datasheet (6 pp, sha256 e0993d380d45fe5d, retrieved 2026-10-29, tier: manufacturer)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF