570BLFT from RENESAS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin	Name	Type	Function
1	S1	input	Select 1 for the output clock multiplier; connect to GND, VDD, or leave floating (self-biases to VDD/2) per the decoding table.
2	VDD	power_in	Power supply; connect to +3.3 V for the ICS570B (3.15 to 3.45 V), with a 0.01 µF decoupling capacitor to GND placed close to the part.
3	GND	power_in	Connect to ground.
4	ICLK	input	Reference clock input.
5	FBIN	input	Feedback clock input, taken from CLK or CLK/2 (CLK/2 feedback is recommended).
6	S0	input	Select 0 for the output clock multiplier; connect to GND, VDD, or leave floating (self-biases to VDD/2) per the decoding table; S1:S0 = 0,0 selects power down and tri-state.
7	CLK	output	Clock output per the multiplier decoding table, up to 170 MHz at 3.3 V.
8	CLK/2	output	Clock output per the decoding table; low-skew divide-by-two of the pin 7 CLK output.

Key specifications

Parameter	Value
Manufacturer	RENESAS
Package	SOIC-8
Category	RTC/Clock Chip
Pins	8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter	Symbol	Min	Typ	Max	Unit	Conditions	Page
Operating Voltage	VDD	3.15		3.45	V	ICS570B	7
Input High Voltage	VIH	2			V	ICLK, FBIN	7
Input Low Voltage	VIL			0.8	V	ICLK, FBIN	7
Input Low Voltage	VIL			0.5	V	S0, S1	7
Output High Voltage	VOH	2.4			V	IOH = -12 mA	7
Output Low Voltage	VOL			0.4	V	IOL = 12mA	7
Short Circuit Current	IOS	-100		100	mA	Each output	7
Operating Current	IDD			16	mA	VDD=3.3 V, 50M input, S1:0 = 11	7
Output Clock Frequency		10		170	MHz	CLK	8
Output to Output Skew			100	175	ps	ICS570B	8
Input to Output Jitter			100	250	ps	40 - 150 MHz	8
Input Skew		-300		300	ps	ICLK to FBIN, CLK>30MHz, Note 1	8
Input Skew		-600		600	ps	ICLK to FBIN, CLK<10MHz, Note 1	8
Output Clock Rise Time				0.75	ns	0.8 to 2.0V, Note 2	8
Output Clock Fall Time				0.75	ns	2.0 to 0.8V, Note 2	8
Output Clock Duty Cycle		45		55	%	at VDD/2	8
Input Capacitance	CIN		5		pF	S0, S1	7
Supply Voltage	VDD			7	V		6
All Inputs and Outputs		-0.5			V	-0.5 V to VDD+0.5 V	6
Ambient Operating Temperature, Commercial		0		70	°C		6
Storage Temperature		-65		150	°C		6
Junction Temperature				125	°C		6
Soldering Temperature				260	°C		6
Ambient Operating Temperature, Commercial version		0		70	°C		6
Power Supply Voltage	VDD	3.15	3.3	3.45	V	measured in respect to GND	6
Thermal Resistance Junction to Ambient	θJA		150		°C/W	Still air	8
Thermal Resistance Junction to Ambient	θJA		140		°C/W	1 m/s air flow	8
Thermal Resistance Junction to Ambient	θJA		120		°C/W	3 m/s air flow	8
Thermal Resistance Junction to Case	θJC		40		°C/W		8

CAD (KiCad official)

Symbol: 570BLFT
Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
3D model: SOIC-8 (KiCad packages3D, STEP)
3D model files: 570blft-etched.step / 570blft-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 570blft.step / 570blft.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

Datasheet: RENESAS datasheet (12 pp, sha256 5b1df40f33185f2d, retrieved 2026-10-31, tier: lcsc)
Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF

570BLFT

Verified 570BLFT

Verification log 1 record

3D Model

Symbol & Footprint

Schematic Symbol

PCB Footprint

Datasheet

README