component
553MLFT
Public Made by Adomby adom
RENESAS Clock Buffers, Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
main
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{
"slug": "553mlft",
"version": "0.1.0",
"type": "component",
"description": "RENESAS Clock Buffers, Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",
"tags": [
"component",
"clock and timing",
"553mlft",
"factory-2.0.0",
"extractor-text"
],
"dependencies": {},
"hero": {
"type": "image",
"path": "docs/hero.png"
},
"files": [
"page.json",
"README.md",
"553mlft.kicad_sym",
"553mlft.kicad_mod",
"553mlft.glb",
"553mlft.step",
"553mlft.lbr",
"docs/hero.png",
"docs/553mlft-datasheet.pdf",
"viewers/symbol.html",
"viewers/footprint.html",
"553mlft-hero.glb",
"553mlft-hero.overlay.json",
"553mlft-etched.glb"
],
"component": {
"mpn": "553MLFT",
"manufacturer": "RENESAS",
"package": "SOIC-8",
"pin_count": 8,
"category": "Clock and Timing",
"subcategory": "Clock Buffers, Drivers",
"datasheet": "https://datasheet.lcsc.com/datasheet/pdf/3f676ac181efc1231c976237193cdbac.pdf",
"parts": {
"symbol": "553mlft.kicad_sym",
"footprint": "553mlft.kicad_mod",
"model_3d": "553mlft-hero.glb",
"model_3d_plain": "553mlft-etched.glb",
"model_3d_step": "553mlft-etched.step",
"model_3d_step_plain": "553mlft.step",
"lbr": "553mlft.lbr"
},
"distributor_links": {
"lcsc": "C2672795",
"digikey": "6690-553MLFTTR-ND",
"mouser": "972-553MLFT"
},
"distributor_check": {
"checked_at": "2026-10-31T00:16:05Z",
"source": "Component Ocean /api/assign-pns",
"digikey": {
"pn": "6690-553MLFTTR-ND",
"status": "found",
"lifecycle": "Active"
},
"mouser": {
"pn": "972-553MLFT",
"status": "found"
}
},
"pins": [
{
"number": "1",
"name": "VDD",
"type": "power_in",
"description": "Positive supply; connect to +2.5 V, +3.3 V or +5.0 V, with operating voltage stated as 2.375 V to 5.25 V overall."
},
{
"number": "2",
"name": "Q0",
"type": "output",
"description": "Clock output 0; all four outputs must use identical terminations, loads and trace geometries to achieve the stated output-to-output skew of 50 ps maximum."
},
{
"number": "3",
"name": "Q1",
"type": "output",
"description": "Clock output 1; all four outputs must use identical terminations, loads and trace geometries to achieve the stated output-to-output skew of 50 ps maximum."
},
{
"number": "4",
"name": "GND",
"type": "power_in",
"description": "Ground; connect to ground, with a 0.01 µF decoupling capacitor recommended between VDD (pin 1) and GND (pin 4) placed close to the device."
},
{
"number": "5",
"name": "ICLK",
"type": "input",
"description": "Clock input; 5 V tolerant, with absolute maximum rating of -0.5 V to 5.5 V."
},
{
"number": "6",
"name": "Q2",
"type": "output",
"description": "Clock output 2; all four outputs must use identical terminations, loads and trace geometries to achieve the stated output-to-output skew of 50 ps maximum."
},
{
"number": "7",
"name": "Q3",
"type": "output",
"description": "Clock output 3; all four outputs must use identical terminations, loads and trace geometries to achieve the stated output-to-output skew of 50 ps maximum."
},
{
"number": "8",
"name": "OE",
"type": "input",
"description": "Output Enable; tri-states the outputs when low, and should be connected to VDD for normal operation."
}
],
"provenance": {
"extractor": "extract_pins 0.3",
"factory_chain": {
"factory": "2.0.0",
"extractor": "extract_pins 0.3",
"primary_model": "claude-haiku-5-5",
"primary_mode": "text",
"consensus_model": "claude-sonnet-5-5",
"consensus": "agreed",
"guards": "pin_guards 0.1: passed",
"guard_notes": [],
"pages_sent": 9,
"cost_usd": 0.0355,
"at": "2026-10-31T00:15:53"
},
"datasheet": {
"url": "https://datasheet.lcsc.com/datasheet/pdf/3f676ac181efc1231c976237193cdbac.pdf",
"pages": 9,
"sha256": "5dfc6b3abd6da676",
"source_tier": "lcsc"
},
"cad": "KiCad official (CC-BY-SA 4.0)",
"pins": {
"total": 8,
"described": 8,
"cites_pages": true,
"refuses_to_fabricate": true
}
},
"viewers": {
"symbol": "viewers/symbol.html",
"footprint": "viewers/footprint.html"
},
"models_3d": [
{
"file": "553mlft.step",
"role": "plain",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
4.9,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",
"checked": "2026-10-31",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
},
{
"file": "553mlft-etched.step",
"role": "eda",
"up": "Z",
"units": "mm",
"origin": "footprint origin = pad-pattern centre",
"seat": "z = 0",
"extents_mm": [
6.0,
4.9,
1.75
],
"zmin_mm": -0.0,
"centre_offset_mm": 0.0,
"footprint_binding": "identity",
"sha256": "7ce743711166b67456bfc9e6a6f517d21ea41184fad4ca757e75fee83f56cb9b",
"checked": "2026-10-31",
"checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"
}
],
"package_dims": {
"package_code": "8-pin SOIC, 150 Mil. Narrow Body",
"source_page": 7,
"D": {
"nom_mm": 4.9,
"range_mm": [
4.8,
5.0
]
},
"E1": {
"nom_mm": 3.9,
"range_mm": [
3.8,
4.0
]
},
"E": {
"nom_mm": 6.0,
"range_mm": [
5.8,
6.2
]
},
"e": {
"nom_mm": 1.27,
"range_mm": [
null,
null
]
},
"A": {
"nom_mm": 1.55,
"range_mm": [
1.35,
1.75
]
},
"source": "datasheet package drawing, every number found on its page (extract_pins --task dims)",
"model_check": {
"file": "553mlft.step",
"verdict": "PASS",
"reasons": [
"height and body within the datasheet's package drawing"
],
"by": "factory/package_fit.py"
}
}
}
}