component

524SDCGI8

Public Made by Adom

by adom

RENESAS Clock Buffers, Drivers, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.

componentclock and timing524sdcgi8factory-2.0.0extractor-text

Verified 524SDCGI8

by Ray · last 30 Oct 2026 · 1 record · files match
SymbolFootprint3D modelPins

Verification log 1 record

30 Oct 2026RayPublished by the parts factory: tier lcsc, 8 pinsfiles match
SymbolFootprint3D modelPinsfor all variants
  • ✓component-page-verify: PASS
  • ✓cad_props: Datasheet, MPN and distributor properties match page.json
  • ✓component: 524SDCGI8 · SOIC-8 · 8 pins
  • ✓copper: 8 copper pads, none touching another net
  • ✓datasheet: all 8 pin names found in the 13-page datasheet
  • ✓distributor: lcsc C1511178, digikey 6690-524SDCGI8TR-ND, mouser 972-524SDCGI8
  • ✓family: SOIC-8_3.9x4.9mm_P1.27mm
  • ✓files: 7 declared files present
  • ✓hero: docs/hero.png 4000x2500
  • ✓lbr: OK: /tmp/cpv-ffrmi9ox/x.lbr is a valid EAGLE .lbr with complete deviceset
  • ✓license: CC-BY-SA-4.0
  • ✓models_3d: 2 records
  • ✓package_fit: height and body within the datasheet's package drawing (datasheet p.10)
  • ✓pads: 8 pins = 8 pads
  • ✓pose: 2 STEP(s) Z-up, seated, centred
  • ✓symbol: 8 pins agree
  • ✓visibility: public, source open
Evidencedatasheet
Verified files✓ 524sdcgi8.kicad_sym✓ 524sdcgi8.kicad_mod✓ 524sdcgi8.step
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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs Publish 0.1.0 · Ray 2h ago
viewers 524sdcgi8: viewers · Ray 2h ago
524sdcgi8-etched.glb Publish 0.1.0 · Ray 2h ago
524sdcgi8-etched.step 524sdcgi8: factory component page (tier=lcsc) · Ray 2h ago
524sdcgi8-hero.glb 524sdcgi8: hero GLB from the etched model (keeps the MPN mark) · Ray 2h ago
524sdcgi8-hero.overlay.json Publish 0.1.0 · Ray 2h ago
524sdcgi8.glb Publish 0.1.0 · Ray 2h ago
524sdcgi8.kicad_mod Publish 0.1.0 · Ray 2h ago
524sdcgi8.kicad_sym Publish 0.1.0 · Ray 2h ago
524sdcgi8.lbr Publish 0.1.0 · Ray 2h ago
524sdcgi8.step Publish 0.1.0 · Ray 2h ago
package.json Publish 0.1.0 · Ray 2h ago
page.json Set visibility: public · Ray 2h ago
README.md Publish 0.1.0 · Ray 2h ago
verification.json Verified: Published by the parts factory: tier lcsc, 8 pins · Ray 2h ago

524SDCGI8

RENESAS · Clock Buffers, Drivers · SOIC-8

524SDCGI8 from RENESAS, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 ICLK input Clock input; the datasheet gives an input frequency range of 0 to 200 MHz.
2 Q0 output Clock output 0; a non-inverting output whose duty cycle matches the incoming clock.
3 Q1 output Clock output 1; a non-inverting output whose duty cycle matches the incoming clock.
4 NC unconnected No connect.
5 VDD power_in Supply pin; connect to +1.8 V, +2.5 V, or +3.3 V, with a 0.01 µF decoupling capacitor to GND on pin 8.
6 Q2 output Clock output 2; a non-inverting output whose duty cycle matches the incoming clock.
7 Q3 output Clock output 3; a non-inverting output whose duty cycle matches the incoming clock.
8 GND power_in Ground; connect to ground.

Key specifications

Parameter Value
Manufacturer RENESAS
Package SOIC-8
Category Clock and Timing
Pins 8

Electrical characteristics

Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).

Parameter Symbol Min Typ Max Unit Conditions Page
Ambient Operating Temperature (extended) -40 105 °C 3
Power Supply Voltage 1.71 3.465 V Measured with respect to GND 3
Supply Voltage, VDD VDD 3.465 V 3
Outputs voltage -0.5 V Max printed as VDD+0.5 V (not numeric, left null) 3
ICLK input voltage 3.465 V 3
Storage Temperature -65 150 °C 3
Junction Temperature 125 °C 3
Soldering Temperature 260 °C 3
Operating Voltage VDD 1.71 1.89 V VDD=1.8V ±5%, ambient -40° to +105°C 4
Input High Voltage, ICLK VIH 0.7 xVDD Note 1 (nominal switching threshold is VDD/2); max printed as VDD (not numeric, left null) 4
Input Low Voltage, ICLK VIL 0.3 xVDD Note 1 (nominal switching threshold is VDD/2) 4
Output High Voltage VOH 1.3 V IOH = -10 mA, VDD=1.8V 4
Output Low Voltage VOL 0.35 V IOL = 10 mA, VDD=1.8V 4
Operating Voltage VDD 2.375 2.625 V VDD=2.5V ±5%, ambient -40° to +105°C 4
Output High Voltage VOH 1.8 V IOH = -16 mA, VDD=2.5V 4
Output Low Voltage VOL 0.5 V IOL = 16 mA, VDD=2.5V 4
Operating Voltage VDD 3.15 3.45 V VDD=3.3V ±5%, ambient -40° to +105°C 4
Output High Voltage VOH 2.2 V IOH = -25 mA, VDD=3.3V 4
Output Low Voltage VOL 0.7 V IOL = 25 mA, VDD=3.3V 4
Input Frequency 0 200 MHz VDD=1.8V ±5% 5
Output Rise Time tOR 0.6 1 ns 0.36 to 1.44 V, CL=5 pF, VDD=1.8V 5
Output Fall Time tOF 0.6 1 ns 1.44 to 0.36 V, CL=5 pF, VDD=1.8V 5
Propagation Delay 1.5 2 4 ns Note 1 (with rail to rail input clock), VDD=1.8V 5
Output to Output Skew 65 ps Rising edges at VDD/2, Note 2 (equal loading), VDD=1.8V 5
Device to Device Skew 200 ps Rising edges at VDD/2, VDD=1.8V 5
Start-up Time tSTART-UP 2 ms Part start-up time for valid outputs after VDD ramp-up, VDD=1.8V 5
Propagation Delay 1.8 2.5 4.5 ns Note 1 (with rail to rail input clock), VDD=2.5V 5
Operating Supply Current IDD 16 mA No load, 135 MHz, VDD=1.8V 4
Operating Supply Current IDD 18 mA No load, 135 MHz, VDD=2.5V 4
Operating Supply Current IDD 22 mA No load, 135 MHz, VDD=3.3V 4
Nominal Output Impedance ZO 17 VDD=1.8V (unit not printed) 4
Input Capacitance CIN 5 pF ICLK, VDD=1.8V 4
Buffer Additive Phase Jitter, RMS 0.05 ps 125MHz, Integration Range 12kHz-20MHz, VDD=1.8V 5
Thermal Resistance Junction to Ambient JA 150 C/W Still air 7
Thermal Resistance Junction to Ambient JA 140 C/W 1 m/s air flow 7
Thermal Resistance Junction to Ambient JA 120 C/W 3 m/s air flow 7
Thermal Resistance Junction to Case JC 40 C/W 7

CAD (KiCad official)

  • Symbol: 524SDCGI8
  • Footprint: Package_SO:SOIC-8_3.9x4.9mm_P1.27mm
  • 3D model: SOIC-8 (KiCad packages3D, STEP)
  • 3D model files: 524sdcgi8-etched.step / 524sdcgi8-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 524sdcgi8.step / 524sdcgi8.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: RENESAS datasheet (13 pp, sha256 75282a5d71f783d3, retrieved 2026-10-30, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF