# 49FCT3805DQGI

**RENESAS** · Clock Buffers, Drivers · QSOP-20-150mil

49FCT3805DQGI from RENESAS, in a QSOP-20-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCCA | power_in | Bank A power supply, VCC = 3.3V ± 0.3V. |
| 2 | OA1 | output | Bank A clock output 1, TTL compatible, follows INA when OEA is LOW and is high-impedance when OEA is HIGH. |
| 3 | OA2 | output | Bank A clock output 2, TTL compatible, follows INA when OEA is LOW and is high-impedance when OEA is HIGH. |
| 4 | OA3 | output | Bank A clock output 3, TTL compatible, follows INA when OEA is LOW and is high-impedance when OEA is HIGH. |
| 5 | GNDA | power_in | Bank A ground. |
| 6 | OA4 | output | Bank A clock output 4, TTL compatible, follows INA when OEA is LOW and is high-impedance when OEA is HIGH. |
| 7 | OA5 | output | Bank A clock output 5, TTL compatible, follows INA when OEA is LOW and is high-impedance when OEA is HIGH. |
| 8 | GNDQ | power_in | Ground for the quiet/monitor section of the device. |
| 9 | OEA | input | Active-LOW 3-state output enable for bank A outputs OA1-OA5; input can be driven from 3.3V or 5V components (VIH min 2V, VIL max 0.8V). |
| 10 | INA | input | Bank A clock input driving OA1-OA5; can be driven from 3.3V or 5V components, up to 166MHz for the 3805E (133MHz for the 3805D). |
| 11 | INB | input | Bank B clock input driving OB1-OB5 and the MON output; can be driven from 3.3V or 5V components, up to 166MHz for the 3805E (133MHz for the 3805D). |
| 12 | OEB | input | Active-LOW 3-state output enable for bank B outputs OB1-OB5; input can be driven from 3.3V or 5V components (VIH min 2V, VIL max 0.8V). |
| 13 | MON | output | Heartbeat monitor output identical to the other outputs and meeting the same output specifications, for diagnostics and PLL driving. |
| 14 | OB5 | output | Bank B clock output 5, TTL compatible, follows INB when OEB is LOW and is high-impedance when OEB is HIGH. |
| 15 | OB4 | output | Bank B clock output 4, TTL compatible, follows INB when OEB is LOW and is high-impedance when OEB is HIGH. |
| 16 | GNDB | power_in | Bank B ground. |
| 17 | OB3 | output | Bank B clock output 3, TTL compatible, follows INB when OEB is LOW and is high-impedance when OEB is HIGH. |
| 18 | OB2 | output | Bank B clock output 2, TTL compatible, follows INB when OEB is LOW and is high-impedance when OEB is HIGH. |
| 19 | OB1 | output | Bank B clock output 1, TTL compatible, follows INB when OEB is LOW and is high-impedance when OEB is HIGH. |
| 20 | VCCB | power_in | Bank B power supply, VCC = 3.3V ± 0.3V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | RENESAS |
| Package | QSOP-20-150mil |
| Category | Clock and Timing |
| Pins | 20 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Input HIGH Level | VIH | 2 |  | 5.5 | V |  | 2 |
| Input LOW Level | VIL | -0.5 |  | 0.8 | V |  | 2 |
| Input HIGH Current | IIH | -1 |  | 1 | µA | VCC = Max., VI = 5.5V | 2 |
| Input LOW Current | IIL | -1 |  | 1 | µA | VCC = Max., VI = GND | 2 |
| High Impedance Output Current | IOZH | -1 |  | 1 | µA | VCC = Max., VO = VCC | 2 |
| Clamp Diode Voltage | VIK |  | -0.7 | -1.2 | V | VCC = Min., IIN = -18mA | 2 |
| Output HIGH Current | IODH | -45 | -74 | -180 | mA | VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V | 2 |
| Output LOW Current | IODL | 50 | 90 | 200 | mA | VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V | 2 |
| Short Circuit Current | IOS | -60 | -135 | -240 | mA | VCC = Max., VO = GND | 2 |
| Output HIGH Voltage | VOH | 2.4 | 3 |  | V | VCC = Min., VIN = VIH or VIL, IOH = -12mA | 2 |
| Output LOW Voltage | VOL |  | 0.3 | 0.4 | V | VCC = Min., VIN = VIH or VIL, IOL = 12mA | 2 |
| Output LOW Voltage | VOL |  | 0.2 | 0.4 | V | VCC = Min., VIN = VIH or VIL, IOL = 8mA | 2 |
| Output LOW Voltage | VOL |  |  | 0.2 | V | VCC = Min., VIN = VIH or VIL, IOL = 100µA | 2 |
| Quiescent Power Supply Current | ICCL/ICCH/ICCZ |  | 0.1 | 30 | µA | VCC = Max., VIN = GND or VCC | 3 |
| Power Supply Current per Input HIGH | ∆ICC |  | 45 | 300 | µA | VCC = Max., VIN = VCC -0.6V | 3 |
| Dynamic Power Supply Current per Output | ICCD |  | 80 | 120 | µA/MHz | VCC = Max., CL = 15pF, All Outputs Toggling | 3 |
| Total Power Supply Current | IC |  | 125 | 150 | mA | VCC = Max., VIN = VCC or GND, CL = 15pF, All Outputs Toggling, fi = 133MHz | 3 |
| Propagation Delay INA to OAn, INB to OBn | tPLH/tPHL | 1 |  | 3 | ns | CL = 15pF, f ≤ 133MHz | 4 |
| Output Rise Time (0.8V to 2V) | tR |  |  | 1.5 | ns |  | 4 |
| Output Fall Time (2V to 0.8V) | tF |  |  | 1.5 | ns |  | 4 |
| Same device output pin to pin skew | tSK(O) |  |  | 270 | ps |  | 4 |
| Pulse skew | tSK(P) |  |  | 270 | ps |  | 4 |
| Part to part skew | tSK(PP) |  |  | 550 | ps |  | 4 |
| Output Enable Time OEA to OAn, OEB to OBn | tPZL/tPZH |  |  | 5.2 | ns |  | 4 |
| Output Disable Time OEA to OAn, OEB to OBn | tPLZ/tPHZ |  |  | 5.2 | ns |  | 4 |
| Input Frequency | fMAX |  |  | 133 | MHz |  | 4 |
| Input Capacitance | CIN |  | 3 | 4 | pF | TA = +25°C, f = 1.0MHz, VIN = 0V | 2 |
| Output Capacitance | COUT |  |  | 6 | pF | TA = +25°C, f = 1.0MHz, VOUT = 0V | 2 |
| Input Power Supply Voltage | VCC | -0.5 |  | 4.6 | V |  | 2 |
| Input Voltage | VI | -0.5 |  | 5.5 | V |  | 2 |
| Output Voltage | VO | -0.5 |  |  | V | -0.5 to VCC+0.5 | 2 |
| Junction Temperature | TJ |  |  | 150 | °C |  | 2 |
| Storage Temperature | TSTG | -65 |  | 165 | °C |  | 2 |
| Operating Ambient Temperature (Industrial) | TA | -40 |  | 85 | °C | VCC = 3.3V ± 0.3V | 2 |

## CAD (KiCad official)

- Symbol: `49FCT3805DQGI`
- Footprint: `Package_SO:QSOP-20_3.9x8.7mm_P0.635mm`
- 3D model: QSOP-20-150mil (KiCad packages3D, STEP)
- 3D model files: `49fct3805dqgi-etched.step` / `49fct3805dqgi-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `49fct3805dqgi.step` / `49fct3805dqgi.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [RENESAS datasheet](docs/49fct3805dqgi-datasheet.pdf) (8 pp, sha256 `531ebfd5b7ed235c`, retrieved 2026-10-27, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/49fct3805dqgi-datasheet.pdf)