# 49FCT3805AQGI8

**RENESAS** · Clock Buffers, Drivers · QSOP-20-150mil

49FCT3805AQGI8 from RENESAS, in a QSOP-20-150mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | VCCA | power_in | Bank A supply pin, VCC = 3.3V ± 0.3V. |
| 2 | OA1 | output | Bank A clock output 1, non-inverting copy of INA with 3-state control from OEA. |
| 3 | OA2 | output | Bank A clock output 2, non-inverting copy of INA with 3-state control from OEA. |
| 4 | OA3 | output | Bank A clock output 3, non-inverting copy of INA with 3-state control from OEA. |
| 5 | GNDA | power_in | Ground pin for bank A. |
| 6 | OA4 | output | Bank A clock output 4, non-inverting copy of INA with 3-state control from OEA. |
| 7 | OA5 | output | Bank A clock output 5, non-inverting copy of INA with 3-state control from OEA. |
| 8 | GNDQ | power_in | Ground pin for the internal/quiet circuitry. |
| 9 | OEA | input | Active-LOW 3-state output enable input for bank A outputs OA1-OA5. |
| 10 | INA | input | Bank A clock input with hysteresis, accepts 3.3V or 5V levels (VIH max 5.5V). |
| 11 | INB | input | Bank B clock input with hysteresis, also drives the MON output; accepts 3.3V or 5V levels (VIH max 5.5V). |
| 12 | OEB | input | Active-LOW 3-state output enable input for bank B outputs OB1-OB5. |
| 13 | MON | output | Heartbeat monitor output, identical to the other outputs and always follows INB (not 3-stated). |
| 14 | OB5 | output | Bank B clock output 5, non-inverting copy of INB with 3-state control from OEB. |
| 15 | OB4 | output | Bank B clock output 4, non-inverting copy of INB with 3-state control from OEB. |
| 16 | GNDB | power_in | Ground pin for bank B. |
| 17 | OB3 | output | Bank B clock output 3, non-inverting copy of INB with 3-state control from OEB. |
| 18 | OB2 | output | Bank B clock output 2, non-inverting copy of INB with 3-state control from OEB. |
| 19 | OB1 | output | Bank B clock output 1, non-inverting copy of INB with 3-state control from OEB. |
| 20 | VCCB | power_in | Bank B supply pin, VCC = 3.3V ± 0.3V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | RENESAS |
| Package | QSOP-20-150mil |
| Category | Clock and Timing |
| Pins | 20 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Operating temperature (Industrial) | TA | -40 |  | 85 | °C | Industrial | 3 |
| Terminal voltage VCC terminals | VTERM | -0.5 |  | 4.6 | V | VCC terminals, with respect to GND | 2 |
| Terminal voltage input terminals | VTERM | -0.5 |  | 7 | V | Input terminals, with respect to GND | 2 |
| Storage temperature | TSTG | -65 |  | 150 | °C |  | 2 |
| DC output current | IOUT | -60 |  | 60 | mA |  | 2 |
| Input capacitance | CIN |  | 4.5 | 6 | pF | VIN = 0V, TA = +25°C, f = 1.0MHz | 2 |
| Output capacitance | COUT |  | 5.5 | 8 | pF | VOUT = 0V, TA = +25°C, f = 1.0MHz | 2 |
| Input HIGH level (input pins) | VIH | 2 |  | 5.5 | V | Guaranteed Logic HIGH Level | 3 |
| Input LOW level | VIL | -0.5 |  | 0.8 | V | Guaranteed Logic LOW Level | 3 |
| Input HIGH current (input pins) | IIH | -1 |  | 1 | µA | VCC = Max., VI = 5.5V | 3 |
| Input HIGH current (I/O pins) | IIH | -1 |  | 1 | µA | VI = VCC | 3 |
| Input LOW current (input pins) | IIL | -1 |  | 1 | µA | VCC = Max., VI = GND | 3 |
| Input LOW current (I/O pins) | IIL | -1 |  | 1 | µA | VI = GND | 3 |
| High impedance output current | IOZH | -1 |  | 1 | µA | VCC = Max., VO = VCC | 3 |
| Clamp diode voltage | VIK |  | -0.7 | -1.2 | V | VCC = Min., IIN = -18mA | 3 |
| Output HIGH current | IODH | -36 | -60 | -110 | mA | VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V | 3 |
| Output LOW current | IODL | 50 | 90 | 200 | mA | VCC = 3.3V, VIN = VIH or VIL, VO = 1.5V | 3 |
| Output HIGH voltage (IOH = -8mA) | VOH | 2.4 | 3 |  | V | VCC = Min., VIN = VIH or VIL, IOH = -8mA | 3 |
| Output LOW voltage (IOL = 0.1mA) | VOL |  |  | 0.2 | V | VCC = Min., VIN = VIH or VIL, IOL = 0.1mA | 3 |
| Output LOW voltage (IOL = 16mA) | VOL |  | 0.2 | 0.4 | V | VCC = Min., VIN = VIH or VIL, IOL = 16mA | 3 |
| Output LOW voltage (IOL = 24mA) | VOL |  | 0.3 | 0.5 | V | VCC = Min., VIN = VIH or VIL, IOL = 24mA | 3 |
| Input power off leakage | IOFF | -1 |  | 1 | µA | VCC = 0V, VIN = 4.5V | 3 |
| Short circuit current | IOS | -60 | -135 | -240 | mA | VCC = Max., VO = GND | 3 |
| Input hysteresis | VH |  | 150 |  | mV |  | 3 |
| Quiescent power supply current | ICCL/ICCH/ICCZ |  | 0.1 | 10 | µA | VCC = Max., VIN = GND or VCC | 3 |
| Quiescent power supply current, TTL inputs HIGH | ∆ICC |  | 10 | 30 | µA | VCC = Max., VIN = VCC -0.6V | 4 |
| Dynamic power supply current | ICCD |  | 0.035 | 0.06 | mA/MHz | VCC = Max., Outputs Open, OEA = OEB = GND, Per Output Toggling, 50% Duty Cycle, VIN = VCC or GND | 4 |
| Total power supply current (25MHz, Mon. toggling) | IC |  | 0.9 | 1.6 | mA | VCC = Max., Outputs Open, fO = 25MHz, 50% Duty Cycle, OEA = OEB = VCC, Mon. Output Toggling, VIN = VCC or GND | 4 |
| Total power supply current (50MHz, eleven outputs toggling) | IC |  | 20 | 33 | mA | VCC = Max., Outputs Open, fO = 50MHz, 50% Duty Cycle, OEA = OEB = GND, Eleven Outputs Toggling, VIN = VCC or GND | 4 |
| Propagation delay INA to OAn, INB to OBn | tPLH/tPHL | 1.5 |  | 5.2 | ns | CL = 50pF, RL = 500Ω, FCT3805A, Industrial | 5 |
| Output rise time | tR |  |  | 2 | ns | FCT3805A, Industrial | 5 |
| Output fall time | tF |  |  | 2 | ns | FCT3805A, Industrial | 5 |
| Output skew | tSK(O) |  |  | 0.6 | ns | Skew between outputs of all banks of same package (inputs tied together), FCT3805A, Industrial | 5 |
| Pulse skew | tSK(P) |  |  | 1 | ns | Skew between opposite transitions of same output (/tPHL, tPLH/), FCT3805A, Industrial | 5 |
| Package skew | tSK(T) |  |  | 1.2 | ns | Skew between outputs of different packages driven by same input source, FCT3805A, Industrial | 5 |
| Output enable time OEA to OAn, OEB to OBn | tPZL/tPZH | 1.5 |  | 6 | ns | FCT3805A, Industrial | 5 |
| Output disable time OEA to OAn, OEB to OBn | tPLZ/tPHZ | 1.5 |  | 5 | ns | FCT3805A, Industrial | 5 |

## CAD (KiCad official)

- Symbol: `49FCT3805AQGI8`
- Footprint: `Package_SO:QSOP-20_3.9x8.7mm_P0.635mm`
- 3D model: QSOP-20-150mil (KiCad packages3D, STEP)
- 3D model files: `49fct3805aqgi8-etched.step` / `49fct3805aqgi8-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `49fct3805aqgi8.step` / `49fct3805aqgi8.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [RENESAS datasheet](docs/49fct3805aqgi8-datasheet.pdf) (8 pp, sha256 `b4eed75cd682e9f7`, retrieved 2026-10-23, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/49fct3805aqgi8-datasheet.pdf)