# 40P30

**HL** · MOSFETs · TO-252

40P30 from HL, in a TO-252. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; gate-source voltage rated ±20 V, threshold -1 to -2.5 V, drive with -4.5 V to -10 V for the stated RDS(on). |
| 2 | D | passive | Drain, the middle lead (short stub) and the exposed tab; rated -40 V drain-source, -30 A continuous at TC=25°C and -60 A pulsed. |
| 3 | S | passive | Source; continuous source (body diode) current -30 A, pulsed -60 A, and diode forward voltage max -1.2 V. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | HL |
| Package | TO-252 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## CAD (KiCad official)

- Symbol: `40P30`
- Footprint: `Package_TO_SOT_SMD:TO-252-2`
- 3D model: TO-252 (KiCad packages3D, STEP)
- 3D model files: `40p30-etched.step` / `40p30-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `40p30.step` / `40p30.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [HL datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590907125525278720) (5 pp, sha256 `55ee0635a83c2211`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/40p30-datasheet.pdf)