# 40N05

**HL** · MOSFETs · SOT-23-3L

40N05 from HL, in a SOT-23-3L. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | G | input | Gate; gate-source voltage is rated at ±20 V maximum, with a threshold of 1 V min, 1.5 V typ and 2.5 V max at VDS=VGS, ID=250μA. |
| 2 | S | passive | Source; continuous drain current is 7 A at TC=25°C and 4 A at TC=100°C with VGS=10 V. |
| 3 | D | passive | Drain; drain-source voltage is rated at 40 V maximum, with a pulsed drain current of 32.8 A. |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | HL |
| Package | SOT-23-3L |
| Category | Transistors/Thyristors |
| Pins | 3 |

## CAD (KiCad official)

- Symbol: `40N05`
- Footprint: `Package_TO_SOT_SMD:SOT-23-3`
- 3D model: SOT-23-3L (KiCad packages3D, STEP)
- 3D model files: `40n05-etched.step` / `40n05-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `40n05.step` / `40n05.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [HL datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603006594741518336) (5 pp, sha256 `d1471c715ad22450`, retrieved 2026-10-09, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/40n05-datasheet.pdf)