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4056D

Public Made by Adom

by adom

HL Battery Management, ESOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.

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Generated by kicad-footprint-generator · KiCad file format 20260206
Name Last commit message Last updated
docs 4056d: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
viewers pin 1: carry the footprint's marker into the .lbr, the viewer and page.json (silk-marker, drawn, top-left) · Ray
4056d-etched.fit.json 4056d: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
4056d-etched.glb 4056d: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
4056d-etched.step 4056d: re-etch, flat white mark read from pin 1 (service-occt 1.4.0) + chip hero · Ray
4056d-hero.glb 4056d: hero from the plain model · Ray
4056d-hero.overlay.json 4056d: hero from the plain model · Ray
4056d.glb fix footprint: SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm -> SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm (3d refresh; body… · Ray
4056d.kicad_mod revert footprint to SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm: the symbol pin count that justified the swap disagrees w… · Ray
4056d.kicad_sym add symbol pin "9" for the exposed thermal pad: the footprint carries the pad and the symbol had none, so it reached no… · Ray
4056d.lbr rebuild the library on adom-lbr 2.32.0. The published copy was built by 2.18.0, which imported every KiCad roundrect an… · Ray
4056d.step fix footprint: SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm -> SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm (3d refresh; body… · Ray
package.json Publish 0.2.1 · Ray
pads.json add symbol pin "9" for the exposed thermal pad: the footprint carries the pad and the symbol had none, so it reached no… · Ray
page.json Publish 0.2.1 · Ray
README.md 4056d: laser-etched CAD + chip hero (factory 2.0.0 backfill) · Ray

4056D

HL · Battery Management · ESOP-8

4056D from HL, in a ESOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 TEMP input Battery temperature sense input. Tied to the midpoint of an external NTC/resistor divider from VCC; charging is suspended when V(TEMP) falls outside 45%*VCC..80%*VCC. Tie to GND to disable temperature monitoring.
2 PROG bidirectional Constant-current program pin and charge-current monitor. A resistor R_PROG to GND sets I_BAT = 1100 / R_PROG (A) (e.g. 1kΩ → 1000mA). Pin regulates to ~1.0V in current mode; leaving it floating puts the device into shutdown.
3 GND power_in Device ground reference. Also connected to the exposed thermal pad on the bottom of the ESOP-8 package for heat dissipation.
4 VCC power_in Positive input supply, 4.2V to 9.0V (typ. 5V, absolute max 9V). Bypass with 10µF to GND. UVLO threshold ~3.6V; VCC-adaptive circuit engages at ~4.3V to reduce charge current if the source droops.
5 BAT power_out Charge current output to the Li-ion battery positive terminal. Regulates to 4.2V float (±1%); delivers programmed CC current up to 1A, trickle current ~230mA below V_TRIKL (2.9V). Bypass with 10µF; reverse-battery protected (leakage <5mA).
6 STDBY output Open-drain charge-complete (standby) indicator, active-low. Pulled low (typ. 0.3V at 5mA) when the battery is fully charged; high-impedance otherwise. Typically drives a green LED to VCC.
7 CHRG output Open-drain charge-in-progress indicator, active-low. Pulled low (typ. 0.3V at 5mA) while charging; high-impedance when done or in fault. Blinks ~1-2s period to signal 'no battery' when TEMP is tied to GND.
8 CE input Chip enable input. Drive high to enable charging; drive low to place the device in shutdown (battery leakage <1µA, supply current <70µA). Absolute max range -0.3V to 10V.

Key specifications

Parameter Value
Manufacturer HL
Package ESOP-8
Category PMIC
Pins 8

Ordering variants

  • 4056D

CAD (KiCad official)

  • Symbol: 4056D
  • Footprint: Package_SO:SOIC-8-1EP_3.9x4.9mm_P1.27mm_EP2.41x3.3mm
  • 3D model: ESOP-8 (KiCad packages3D, STEP)
  • 3D model files: 4056d-etched.step / 4056d-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 4056d.step / 4056d.glb are the bare package body.

3D model downloads

Two STEP files. Same geometry, different body top:

File Size Use it when
4056d.step 193 KB You want the bare part, or you mark your own boards.
4056d-etched.step 1.1 MB You want the part with 4056D already on it.

The marking in the etched file is real recessed geometry cut into the solid, not a texture or a decal: 283 faces against 63 in the bare model. It survives export, section views, and rendering in any CAD tool, and it drops straight into KiCad or Fusion with no extra setup.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: HL datasheet (10 pp, sha256 86254f07866bff7b, retrieved 2026-08-17, tier: lcsc)
  • Extractor: ds2sf (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF