component
3525
Public Made by Adomby adom
IDCHIP DC-DC Converters, SOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
Generated by kicad-footprint-generator · KiCad file format 20260206
| Name | Last updated |
|---|---|
| docs | 5d ago |
| viewers | 5d ago |
| 3525-etched.glb | 5d ago |
| 3525-etched.step | 5d ago |
| 3525-hero.glb | 5d ago |
| 3525-hero.overlay.json | 5d ago |
| 3525.glb | 5d ago |
| 3525.kicad_mod | 5d ago |
| 3525.kicad_sym | 5d ago |
| 3525.lbr | 5d ago |
| 3525.step | 5d ago |
| package.json | 5d ago |
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| README.md | 5d ago |
3525
IDCHIP · DC-DC Converters · SOP-16
3525 from IDCHIP, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Inv. Input | input | Inverting input of the error amplifier, whose common-mode range is +1.5 V to +5.2 V. |
| 2 | Noninv. Input | input | Non-inverting input of the error amplifier, whose common-mode range is +1.5 V to +5.2 V. |
| 3 | Sync | input | Synchronization input that locks the internal oscillator to an external clock or enables master/slave operation. |
| 4 | OSC Output | output | Oscillator output that provides the clock signal for synchronizing slave devices. |
| 5 | CT | passive | Oscillator timing capacitor, specified from 0.001 µF to 0.2 µF. |
| 6 | RT | passive | Oscillator timing resistor, specified from 2.0 kΩ to 150 kΩ. |
| 7 | Discharge | passive | Dead-time discharge pin connected to the dead-time resistor RD, which is specified from 0 Ω to 500 Ω. |
| 8 | Soft-Start | passive | Soft-start pin with a pull-up current source whose capacitor is discharged at about 100 µA during shutdown. |
| 9 | Compensation | passive | Error amplifier compensation pin with a pull-up current source; a pull-down of up to 100 µA shuts off the outputs. |
| 10 | Shutdown | input | Shutdown input in which a high level immediately latches the PWM and discharges the soft-start capacitor, and which must not be left floating. |
| 11 | Output A | output | Output A, a totem-pole driver rated for ±400 mA peak that alternates with Output B. |
| 12 | Ground | power_in | Ground return for the device. |
| 13 | VC | power_in | Output stage supply, specified from 4.5 V to 35 V. |
| 14 | Output B | output | Output B, a totem-pole driver rated for ±400 mA peak that alternates with Output A. |
| 15 | VCC | power_in | Supply voltage input, specified from 8.0 V to 35 V. |
| 16 | Vref | power_out | Reference output at 5.1 V ±1.0%, with a load current of 0 mA to 20 mA. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | IDCHIP |
| Package | SOP-16 |
| Category | Power Management ICs |
| Pins | 16 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Absolute maximum VCC supply voltage | VCC | 40 | Vdc | 2 | |||
| Absolute maximum collector supply voltage | VC | 40 | Vdc | 2 | |||
| Absolute maximum logic input voltage | -0.3 | 5.5 | V | 2 | |||
| Absolute maximum analog input voltage | -0.3 | V | to VCC | 2 | |||
| Absolute maximum output current | IO | -500 | 500 | mA | 2 | ||
| Absolute maximum reference output current | Iref | 50 | mA | 2 | |||
| Absolute maximum oscillator charging current | 5 | mA | 2 | ||||
| Power dissipation | PD | 1000 | mW | TA = +25°C (derate 10 mW/°C above +50°C) | 2 | ||
| Power dissipation | PD | 2000 | mW | TC = +25°C (derate 16 mW/°C above +25°C case) | 2 | ||
| Thermal resistance junction to ambient | RθJA | 100 | °C/W | 2 | |||
| Thermal resistance junction to case | RθJC | 60 | °C/W | 2 | |||
| Operating junction temperature | TJ | 150 | °C | 2 | |||
| Storage temperature range | Tstg | -55 | 125 | °C | 2 | ||
| Soldering temperature | TSolder | 300 | °C | 10 seconds | 2 | ||
| Supply voltage | VCC | 8 | 35 | Vdc | 2 | ||
| Collector supply voltage | VC | 4.5 | 35 | Vdc | 2 | ||
| Output current | IO | 0 | 100 | mA | 2 | ||
| Output current, peak | IO | 0 | 400 | mA | 2 | ||
| Reference load current | Iref | 0 | 20 | mA | 2 | ||
| Oscillator frequency range | fosc | 0.1 | 400 | kHz | 2 | ||
| Timing resistor range | RT | 2 | 150 | kΩ | 2 | ||
| Timing capacitor range | CT | 0.001 | 0.2 | µF | 2 | ||
| Deadtime resistor range | RD | 0 | 500 | Ω | 2 | ||
| Operating ambient temperature range | TA | 0 | 70 | °C | 2 | ||
| Reference output voltage | Vref | 5 | 5.1 | 5.2 | Vdc | VCC = +20 V, TJ = +25°C | 3 |
| Line regulation | Regline | 10 | 20 | mV | +8.0 V ≤ VCC ≤ +35 V | 3 | |
| Load regulation | Regload | 20 | 50 | mV | 0 mA ≤ IL ≤ 20 mA | 3 | |
| Temperature stability of reference | ΔVref/ΔT | 20 | mV | 3 | |||
| Short circuit current | ISC | 80 | 100 | mA | Vref = 0 V, TJ = +25°C | 3 | |
| Output noise voltage | Vn | 40 | 200 | µVrms | 10 Hz ≤ f ≤ 10 kHz, TJ = +25°C | 3 | |
| Long term stability | S | 20 | 50 | mV/khr | TJ = +125°C | 3 | |
| Initial accuracy | 2 | 6 | % | TJ = +25°C | 3 | ||
| Voltage frequency stability | ΔfOSC/ΔVCC | 1 | 2 | % | +8.0 V ≤ VCC ≤ +35 V | 3 | |
| Temperature frequency stability | ΔfOSC/ΔT | 0.3 | % | 3 | |||
| Minimum oscillator frequency | fmin | 50 | Hz | RT = 150 kΩ, CT = 0.2 µF | 3 | ||
| Maximum oscillator frequency | fmax | 400 | kHz | RT = 2.0 kΩ, CT = 1.0 nF | 3 | ||
| Oscillator charge current | 1.7 | 2 | 2.2 | mA | IRT = 2.0 mA | 3 | |
| Clock amplitude | 3 | 3.5 | V | 3 | |||
| Clock width | 0.3 | 0.5 | 1 | µs | TJ = +25°C | 3 | |
| Sync threshold | 1.2 | 2 | 2.8 | V | 3 | ||
| Sync input current | 1 | 2.5 | mA | Sync Voltage = +3.5 V | 3 | ||
| Input offset voltage | VIO | 2 | 10 | mV | VCM = +5.1 V | 3 | |
| Input bias current | IIB | 1 | 10 | µA | 3 | ||
| Input offset current | IIO | 1 | µA | 3 | |||
| DC open loop gain | AVOL | 60 | 75 | dB | RL ≥ 10 MΩ | 3 | |
| Low level output voltage | VOL | 0.2 | 0.5 | V | 3 | ||
| High level output voltage | VOH | 3.8 | 5.6 | V | 3 | ||
| Common mode rejection ratio | CMRR | 60 | 75 | dB | +1.5 V ≤ VCM ≤ +5.2 V | 3 | |
| Power supply rejection ratio | PSRR | 50 | 60 | dB | +8.0 V ≤ VCC ≤ +35 V | 3 | |
| Minimum duty cycle | DCmin | 0 | % | 3 | |||
| Maximum duty cycle | DCmax | 45 | 49 | % | 3 | ||
| Input threshold at zero duty cycle | Vth | 0.6 | 0.9 | V | Note 6 | 3 | |
| Input threshold at maximum duty cycle | Vth | 3.3 | 3.6 | V | Note 6 | 3 | |
| PWM comparator input bias current | IIB | 0.05 | 1 | µA | 3 | ||
| Soft-start current | 25 | 50 | 80 | µA | V shutdown = 0 V | 4 | |
| Soft-start voltage | 0.4 | 0.6 | V | V shutdown = 2.0 V | 4 | ||
| Shutdown input current | 0.4 | 1 | mA | V shutdown = 2.5 V | 4 | ||
| Output low level voltage | VOL | 0.2 | 0.4 | V | Each Output, VCC = +20 V, Isink = 20 mA | 4 | |
| Output low level voltage | VOL | 1 | 2 | V | Each Output, VCC = +20 V, Isink = 100 mA | 4 | |
| Output high level voltage | VOH | 18 | 19 | V | Each Output, VCC = +20 V, Isource = 20 mA | 4 | |
| Output high level voltage | VOH | 17 | 18 | V | Each Output, VCC = +20 V, Isource = 100 mA | 4 | |
| Undervoltage lockout threshold | VUL | 6 | 7 | 8 | V | V8 and V9 = High | 4 |
| Collector leakage current | IC(leak) | 200 | µA | VC = +35 V | 4 | ||
| Rise time | tr | 100 | 600 | ns | CL = 1.0 nF, TJ = 25°C | 4 | |
| Fall time | tf | 50 | 300 | ns | CL = 1.0 nF, TJ = 25°C | 4 | |
| Shutdown delay | tds | 0.2 | 0.5 | µs | VDS = +3.0 V, CS = 0, TJ = +25°C | 4 | |
| Supply current | ICC | 14 | 20 | mA | VCC = +35 V | 4 |
CAD (KiCad official)
- Symbol:
3525 - Footprint:
Package_SO:SOIC-16_3.9x9.9mm_P1.27mm - 3D model: SOP-16 (KiCad packages3D, STEP)
- 3D model files:
3525-etched.step/3525-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);3525.step/3525.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: IDCHIP datasheet (7 pp, sha256
da8d2eb9e542155d, retrieved 2026-10-28, tier: lcsc) - Datasheet language: Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.
- Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).