component
2SK880-Y
Public Made by Adomby adom
TOSHIBA JFETs, SOT-323. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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2SK880-Y
TOSHIBA · JFETs · SOT-323
2SK880-Y from TOSHIBA, in a SOT-323. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SOURCE | passive | Source terminal of the N-channel junction FET; IDSS is measured at VDS = 10 V, VGS = 0 (Y rank: 1.2 to 3.0 mA). |
| 2 | DRAIN | passive | Drain terminal; gate-drain voltage is limited to VGDS = −50 V and drain power dissipation to PD = 100 mW. |
| 3 | GATE | passive | Gate terminal; gate current IG is limited to 10 mA and gate cut-off current is −1.0 nA max at VGS = −30 V. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TOSHIBA |
| Package | SOT-323 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Gate cut-off current | IGSS | -1 | nA | VGS = −30 V, VDS = 0 | 1 | ||
| Gate-drain breakdown voltage | V(BR)GDS | -50 | V | VDS = 0, IG = −100 μA | 1 | ||
| Drain current (IDSS classification Y) | IDSS | 1.2 | 3 | mA | VDS = 10 V, VGS = 0 | 1 | |
| Gate-source cut-off voltage | VGS(OFF) | -0.2 | -1.5 | V | VDS = 10 V, ID = 0.1 μA | 1 | |
| Forward transfer admittance | /Yfs/ | 4 | 15 | mS | VDS = 10 V, VGS = 0, f = 1 kHz | 1 | |
| Gate-drain voltage | VGDS | -50 | V | 1 | |||
| Gate current | IG | 10 | mA | 1 | |||
| Drain power dissipation | PD | 100 | mW | 1 | |||
| Junction temperature | Tj | 125 | °C | 1 | |||
| Storage temperature range | Tstg | -55 | 125 | °C | 1 |
CAD (KiCad official)
- Symbol:
2SK880-Y - Footprint:
Package_TO_SOT_SMD:SOT-323_SC-70 - 3D model: SOT-323 (KiCad packages3D, STEP)
- 3D model files:
2sk880-y-etched.step/2sk880-y-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);2sk880-y.step/2sk880-y.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: TOSHIBA datasheet (4 pp, sha256
28d821360cfc842c, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(text+vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 2SK880-Y
**TOSHIBA** · JFETs · SOT-323
2SK880-Y from TOSHIBA, in a SOT-323. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | SOURCE | passive | Source terminal of the N-channel junction FET; IDSS is measured at VDS = 10 V, VGS = 0 (Y rank: 1.2 to 3.0 mA). |
| 2 | DRAIN | passive | Drain terminal; gate-drain voltage is limited to VGDS = −50 V and drain power dissipation to PD = 100 mW. |
| 3 | GATE | passive | Gate terminal; gate current IG is limited to 10 mA and gate cut-off current is −1.0 nA max at VGS = −30 V. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | TOSHIBA |
| Package | SOT-323 |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Gate cut-off current | IGSS | | | -1 | nA | VGS = −30 V, VDS = 0 | 1 |
| Gate-drain breakdown voltage | V(BR)GDS | -50 | | | V | VDS = 0, IG = −100 μA | 1 |
| Drain current (IDSS classification Y) | IDSS | 1.2 | | 3 | mA | VDS = 10 V, VGS = 0 | 1 |
| Gate-source cut-off voltage | VGS(OFF) | -0.2 | | -1.5 | V | VDS = 10 V, ID = 0.1 μA | 1 |
| Forward transfer admittance | /Yfs/ | 4 | 15 | | mS | VDS = 10 V, VGS = 0, f = 1 kHz | 1 |
| Gate-drain voltage | VGDS | | | -50 | V | | 1 |
| Gate current | IG | | | 10 | mA | | 1 |
| Drain power dissipation | PD | | | 100 | mW | | 1 |
| Junction temperature | Tj | | | 125 | °C | | 1 |
| Storage temperature range | Tstg | -55 | | 125 | °C | | 1 |
## CAD (KiCad official)
- Symbol: `2SK880-Y`
- Footprint: `Package_TO_SOT_SMD:SOT-323_SC-70`
- 3D model: SOT-323 (KiCad packages3D, STEP)
- 3D model files: `2sk880-y-etched.step` / `2sk880-y-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `2sk880-y.step` / `2sk880-y.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [TOSHIBA datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603010859983781888) (4 pp, sha256 `28d821360cfc842c`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/2sk880-y-datasheet.pdf)