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2SB805
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Shikues Bipolar Transistors - BJT, SOT-89. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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2SB805
Shikues · Bipolar Transistors - BJT · SOT-89
2SB805 from Shikues, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Base | input | Base of the PNP transistor; VEBO max is -5 V and IC max is -0.7 A (-1.2 A pulse). |
| 2 | Collector | passive | Collector; VCBO and VCEO are -100 V max, IC is -0.7 A max, and power dissipation is 2 W. |
| 3 | Emitter | passive | Emitter of the PNP transistor; VEBO max is -5 V relative to base. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shikues |
| Package | SOT-89 |
| Category | Transistors |
| Pins | 3 |
CAD (KiCad official)
- Symbol:
2SB805 - Footprint:
Package_TO_SOT_SMD:SOT-89-3 - 3D model: SOT-89 (KiCad packages3D, STEP)
- 3D model files:
2sb805-etched.step/2sb805-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);2sb805.step/2sb805.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shikues datasheet (1 pp, sha256
51ec3bf2b064dd63, retrieved 2026-10-29, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-sonnet-5-5(vision), consensusclaude-opus-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 2SB805
**Shikues** · Bipolar Transistors - BJT · SOT-89
2SB805 from Shikues, in a SOT-89. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | Base | input | Base of the PNP transistor; VEBO max is -5 V and IC max is -0.7 A (-1.2 A pulse). |
| 2 | Collector | passive | Collector; VCBO and VCEO are -100 V max, IC is -0.7 A max, and power dissipation is 2 W. |
| 3 | Emitter | passive | Emitter of the PNP transistor; VEBO max is -5 V relative to base. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shikues |
| Package | SOT-89 |
| Category | Transistors |
| Pins | 3 |
## CAD (KiCad official)
- Symbol: `2SB805`
- Footprint: `Package_TO_SOT_SMD:SOT-89-3`
- 3D model: SOT-89 (KiCad packages3D, STEP)
- 3D model files: `2sb805-etched.step` / `2sb805-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `2sb805.step` / `2sb805.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Shikues datasheet](docs/2sb805-datasheet.pdf) (1 pp, sha256 `51ec3bf2b064dd63`, retrieved 2026-10-29, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/2sb805-datasheet.pdf)