# 2N7002NT

**Leiditech** · MOSFETs · SOT-523

2N7002NT from Leiditech, in a SOT-523. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

## Pinout

| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GATE | input | Gate terminal of the N-channel MOSFET, with a gate-source voltage rating of ±20 V (VGS). |
| 2 | SOURCE | passive | Source terminal of the N-channel MOSFET, referenced against the drain-source voltage rating of 30 V (VDS). |
| 3 | DRAIN | passive | Drain terminal of the N-channel MOSFET, rated for a drain-source voltage of 30 V (VDS) and a power dissipation of 0.15 W (PD). |

## Key specifications

| Parameter | Value |
|---|---|
| Manufacturer | Leiditech |
| Package | SOT-523 |
| Category | Transistors/Thyristors |
| Pins | 3 |

## Electrical characteristics

Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).

| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-Source Voltage | VDS |  |  | 30 | V | Ta = 25°C | 1 |
| Gate-Source Voltage | VGS | -20 |  | 20 | V | Ta = 25°C | 1 |
| Power Dissipation | PD |  |  | 0.15 | W | Ta = 25°C | 1 |
| Junction Temperature | TJ |  |  | 150 | ℃ | Ta = 25°C | 1 |
| Storage Temperature | Tstg | -55 |  | 150 | ℃ | Ta = 25°C | 1 |
| Zero Gate Voltage Drain Current | IDSS |  |  | 1 | µA | VDS =30V, VGS = 0V | 2 |
| Gate-Source Leakage Current | IGSS | -2 |  | 2 | µA | VGS =±20V, VDS = 0V | 2 |
| Drain-Source Breakdown Voltage | VDS | 30 |  |  | V | VGS = 0V, ID = 10µA | 2 |
| Drain-Source On-Resistance | RDS(on) |  |  | 4 | Ω | VGS = 10V, ID = 200mA | 2 |
| Drain-Source On-Resistance | RDS(on) |  |  | 8 | Ω | VGS = 4.5V, ID = 150mA | 2 |
| Forward Transconductance | gFS | 20 |  |  | mS | VDS =3V, ID = 10mA | 2 |
| Gate Threshold Voltage | VGS(th) |  | 1.5 |  | V | VDS = 3V, ID =100µA | 2 |
| Input Capacitance | Ciss |  | 13 |  | pF | VDS =5V,VGS =0V,f =1MHz | 2 |
| Output Capacitance | Coss |  | 9 |  | pF | VDS =5V,VGS =0V,f =1MHz | 2 |
| Reverse Transfer Capacitance | Crss |  | 4 |  | pF | VDS =5V,VGS =0V,f =1MHz | 2 |
| Turn-On Delay Time | td(on) |  | 15 |  | ns | VGS =5V, VDD =5V, ID =10mA, Rg=10Ω, RL=500Ω | 2 |
| Rise Time | tr |  | 35 |  | ns | VGS =5V, VDD =5V, ID =10mA, Rg=10Ω, RL=500Ω | 2 |
| Turn-Off Delay Time | td(off) |  | 80 |  | ns | VGS =5V, VDD =5V, ID =10mA, Rg=10Ω, RL=500Ω | 2 |
| Fall Time | tf |  | 80 |  | ns | VGS =5V, VDD =5V, ID =10mA, Rg=10Ω, RL=500Ω | 2 |
| Thermal Resistance, Junction-to-Ambient | RθJA |  | 833 |  | ℃ /W |  | 1 |

## CAD (KiCad official)

- Symbol: `2N7002NT`
- Footprint: `Package_TO_SOT_SMD:SOT-523`
- 3D model: SOT-523, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.8 mm nominal SOT-523 height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
- 3D model files: `2n7002nt-etched.step` / `2n7002nt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `2n7002nt.step` / `2n7002nt.glb` are the bare package body.

## Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

- **Datasheet:** [Leiditech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588944328705761280) (3 pp, sha256 `53ecd63e5826131d`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).

[Datasheet PDF](docs/2n7002nt-datasheet.pdf)