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Generated by kicad-footprint-generator · KiCad file format 20260206
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2N7002KX

Shenzhen JingYang · MOSFETs · SOT-23

2N7002KX from Shenzhen JingYang, in a SOT-23. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 GATE input Voltage-controlled gate input, rated VGS ±20 V, with gate threshold VGS(th) of 1 to 2.5 V at ID = 250 µA.
2 SOURCE passive Source terminal of the MOSFET, whose forward source-drain voltage VSD is specified at 0.87 V typical and 1.2 V maximum at VGS = 0 V, IS = 0.2 A.
3 DRAIN passive Drain terminal rated for VDS of 60 V, with continuous drain current ID of 0.3 A at TA = 25 °C and pulsed current IDM of 0.8 A.

Key specifications

Parameter Value
Manufacturer Shenzhen JingYang
Package SOT-23
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: 2N7002KX
  • Footprint: Package_TO_SOT_SMD:SOT-23
  • 3D model: SOT-23 (KiCad packages3D, STEP)
  • 3D model files: 2n7002kx-etched.step / 2n7002kx-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 2n7002kx.step / 2n7002kx.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Shenzhen JingYang datasheet (5 pp, sha256 5985b9de76d57552, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-haiku-5-5 (text), consensus claude-sonnet-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF