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2N7002KWX
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Shenzhen JingYang MOSFETs, SOT-323. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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2N7002KWX
Shenzhen JingYang · MOSFETs · SOT-323
2N7002KWX from Shenzhen JingYang, in a SOT-323. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GATE | input | Gate of the 60 V N-channel MOSFET, with gate-source voltage limited to ±20 V (absolute maximum) and a gate-source Zener clamp rated ±21.5 V to ±30 V breakdown, with HBM ESD protection of 2 kV. |
| 2 | SOURCE | passive | Source of the MOSFET, the reference for the gate-source voltage and the return path for drain current rated at 340 mA continuous at Ta=25℃. |
| 3 | DRAIN | passive | Drain of the MOSFET, rated at 60 V drain-source (VDS) and 340 mA continuous drain current (ID), with power dissipation of 150 mW. |
Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shenzhen JingYang |
| Package | SOT-323 |
| Category | Transistors/Thyristors |
| Pins | 3 |
Electrical characteristics
Limits as printed in the datasheet (page.json metadata.characteristics carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source breakdown voltage | V(BR)DSS | 60 | V | VGS = 0V, ID =250µA | 2 | ||
| Gate threshold voltage | VGS(th) | 1 | 1.4 | 2.5 | V | VDS =VGS, ID =250µA | 2 |
| Drain-source on-resistance | RDS(on) | 1.4 | 5.3 | Ω | VGS =4.5V, ID =200mA | 2 | |
| Drain-source on-resistance | RDS(on) | 1.3 | 5 | Ω | VGS =10V, ID =500mA | 2 | |
| Zero gate voltage drain current | IDSS | 1 | µA | VDS =48V,VGS = 0V | 2 | ||
| Gate-body leakage current | IGSS | -10 | 10 | µA | VGS =±20V, VDS = 0V | 2 | |
| Diode Forward Voltage | VSD | 1.5 | V | VGS=0V, IS=300mA | 2 | ||
| Recovered charge | Qr | 30 | nC | VGS=0V,IS=300mA,VR=25V, dls/dt=-100A/μs | 2 | ||
| Gate-Source Breakdown Voltage | BVGSO | 21.5 | 30 | V | Igs=±1mA (Open Drain) | 2 | |
| Input Capacitance | Ciss | 40 | pF | VDS =10V,VGS =0V,f =1MHz | 2 | ||
| Output Capacitance | Coss | 30 | pF | VDS =10V,VGS =0V,f =1MHz | 2 | ||
| Reverse Transfer Capacitance | Crss | 10 | pF | VDS =10V,VGS =0V,f =1MHz | 2 | ||
| Turn-on delay time | td(on) | 10 | ns | VGS=10V,VDD=50V,RG=50Ω, RGS=50Ω, RL=250Ω | 2 | ||
| Turn-off delay time | td(off) | 15 | ns | VGS=10V,VDD=50V,RG=50Ω, RGS=50Ω, RL=250Ω | 2 | ||
| Reverse recovery Time | tf | 30 | ns | VGS=0V,IS=300mA,VR=25V, dls/dt=-100A/μs | 2 | ||
| Drain-Source Voltage | VDS | 60 | V | Ta=25℃ unless otherwise noted | 1 | ||
| Gate-Source Voltage | VGS | -20 | 20 | V | Ta=25℃ unless otherwise noted | 1 | |
| Continuous Drain Current | ID | 340 | mA | Ta=25℃ unless otherwise noted | 1 | ||
| Power Dissipation | PD | 150 | mW | Ta=25℃ unless otherwise noted; footnote (1) | 1 | ||
| Junction Temperature | TJ | 150 | ℃ | 1 | |||
| Storage Temperature | TSTG | -55 | 150 | ℃ | 1 | ||
| Thermal Resistance from Junction to Ambient | RθJA | 833 | ℃/W | footnote (1) | 1 |
CAD (KiCad official)
- Symbol:
2N7002KWX - Footprint:
Package_TO_SOT_SMD:SOT-323_SC-70 - 3D model: SOT-323 (KiCad packages3D, STEP)
- 3D model files:
2n7002kwx-etched.step/2n7002kwx-etched.glbcarry the MPN laser-etched on the die in a toggleableAdom.LaserEtchgroup (Fusion-ready);2n7002kwx.step/2n7002kwx.glbare the bare package body.
Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- Datasheet: Shenzhen JingYang datasheet (4 pp, sha256
0fad0200d5ad6628, retrieved 2026-10-17, tier: lcsc) - Extractor: parts-factory
2.0.0/extract_pins 0.3, primaryclaude-haiku-5-5(text), consensusclaude-sonnet-5-5(agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - CAD: KiCad official libraries (CC-BY-SA 4.0).
# 2N7002KWX
**Shenzhen JingYang** · MOSFETs · SOT-323
2N7002KWX from Shenzhen JingYang, in a SOT-323. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.
## Pinout
| Pin | Name | Type | Function |
|---|---|---|---|
| 1 | GATE | input | Gate of the 60 V N-channel MOSFET, with gate-source voltage limited to ±20 V (absolute maximum) and a gate-source Zener clamp rated ±21.5 V to ±30 V breakdown, with HBM ESD protection of 2 kV. |
| 2 | SOURCE | passive | Source of the MOSFET, the reference for the gate-source voltage and the return path for drain current rated at 340 mA continuous at Ta=25℃. |
| 3 | DRAIN | passive | Drain of the MOSFET, rated at 60 V drain-source (VDS) and 340 mA continuous drain current (ID), with power dissipation of 150 mW. |
## Key specifications
| Parameter | Value |
|---|---|
| Manufacturer | Shenzhen JingYang |
| Package | SOT-323 |
| Category | Transistors/Thyristors |
| Pins | 3 |
## Electrical characteristics
Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).
| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |
|---|---|---|---|---|---|---|---|
| Drain-source breakdown voltage | V(BR)DSS | 60 | | | V | VGS = 0V, ID =250µA | 2 |
| Gate threshold voltage | VGS(th) | 1 | 1.4 | 2.5 | V | VDS =VGS, ID =250µA | 2 |
| Drain-source on-resistance | RDS(on) | | 1.4 | 5.3 | Ω | VGS =4.5V, ID =200mA | 2 |
| Drain-source on-resistance | RDS(on) | | 1.3 | 5 | Ω | VGS =10V, ID =500mA | 2 |
| Zero gate voltage drain current | IDSS | | | 1 | µA | VDS =48V,VGS = 0V | 2 |
| Gate-body leakage current | IGSS | -10 | | 10 | µA | VGS =±20V, VDS = 0V | 2 |
| Diode Forward Voltage | VSD | | | 1.5 | V | VGS=0V, IS=300mA | 2 |
| Recovered charge | Qr | | | 30 | nC | VGS=0V,IS=300mA,VR=25V, dls/dt=-100A/μs | 2 |
| Gate-Source Breakdown Voltage | BVGSO | 21.5 | | 30 | V | Igs=±1mA (Open Drain) | 2 |
| Input Capacitance | Ciss | | 40 | | pF | VDS =10V,VGS =0V,f =1MHz | 2 |
| Output Capacitance | Coss | | 30 | | pF | VDS =10V,VGS =0V,f =1MHz | 2 |
| Reverse Transfer Capacitance | Crss | | 10 | | pF | VDS =10V,VGS =0V,f =1MHz | 2 |
| Turn-on delay time | td(on) | | 10 | | ns | VGS=10V,VDD=50V,RG=50Ω, RGS=50Ω, RL=250Ω | 2 |
| Turn-off delay time | td(off) | | 15 | | ns | VGS=10V,VDD=50V,RG=50Ω, RGS=50Ω, RL=250Ω | 2 |
| Reverse recovery Time | tf | | 30 | | ns | VGS=0V,IS=300mA,VR=25V, dls/dt=-100A/μs | 2 |
| Drain-Source Voltage | VDS | | | 60 | V | Ta=25℃ unless otherwise noted | 1 |
| Gate-Source Voltage | VGS | -20 | | 20 | V | Ta=25℃ unless otherwise noted | 1 |
| Continuous Drain Current | ID | | | 340 | mA | Ta=25℃ unless otherwise noted | 1 |
| Power Dissipation | PD | | | 150 | mW | Ta=25℃ unless otherwise noted; footnote (1) | 1 |
| Junction Temperature | TJ | | | 150 | ℃ | | 1 |
| Storage Temperature | TSTG | -55 | | 150 | ℃ | | 1 |
| Thermal Resistance from Junction to Ambient | RθJA | | | 833 | ℃/W | footnote (1) | 1 |
## CAD (KiCad official)
- Symbol: `2N7002KWX`
- Footprint: `Package_TO_SOT_SMD:SOT-323_SC-70`
- 3D model: SOT-323 (KiCad packages3D, STEP)
- 3D model files: `2n7002kwx-etched.step` / `2n7002kwx-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `2n7002kwx.step` / `2n7002kwx.glb` are the bare package body.
## Provenance
Data extracted from the manufacturer datasheet, not a distributor listing:
- **Datasheet:** [Shenzhen JingYang datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8602988663068913664) (4 pp, sha256 `0fad0200d5ad6628`, retrieved 2026-10-17, tier: lcsc)
- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
- **CAD:** KiCad official libraries (CC-BY-SA 4.0).
[Datasheet PDF](docs/2n7002kwx-datasheet.pdf)