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Ray Publish 0.1.0 42b69f4 15d ago

2N7002KT7

Siliup · MOSFETs · SOT-723

2N7002KT7 from Siliup, in a SOT-723. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.

Pinout

Pin Name Type Function
1 G input Gate; gate-source voltage limited to ±20 V absolute maximum, with a gate threshold of 1 V min to 2.5 V max at ID=250µA and 2 kV ESD protection.
2 S passive Source of the N-channel MOSFET, connected to the body diode anode and the gate ESD protection diode.
3 D passive Drain; rated for 60 V drain-source voltage (VDSS) and 300 mA continuous drain current.

Key specifications

Parameter Value
Manufacturer Siliup
Package SOT-723
Category Transistors/Thyristors
Pins 3

CAD (KiCad official)

  • Symbol: 2N7002KT7
  • Footprint: Package_TO_SOT_SMD:SOT-723
  • 3D model: SOT-723, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.5 mm nominal SOT-723 height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)
  • 3D model files: 2n7002kt7-etched.step / 2n7002kt7-etched.glb carry the MPN laser-etched on the die in a toggleable Adom.LaserEtch group (Fusion-ready); 2n7002kt7.step / 2n7002kt7.glb are the bare package body.

Provenance

Data extracted from the manufacturer datasheet, not a distributor listing:

  • Datasheet: Siliup datasheet (5 pp, sha256 69fc120ad778d206, retrieved 2026-10-09, tier: lcsc)
  • Extractor: parts-factory 2.0.0 / extract_pins 0.3, primary claude-sonnet-5-5 (text+vision), consensus claude-opus-5-5 (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.
  • CAD: KiCad official libraries (CC-BY-SA 4.0).

Datasheet PDF